Lines Matching refs:CS0
207 [dq], CS0, (1 - ecc) * in ddr3_pbs_tx()
374 ddr3_pbs_write_pup_dqs_reg(CS0, pup, INIT_WL_DELAY); in ddr3_pbs_tx()
453 ddr3_pbs_write_pup_dqs_reg(CS0, in ddr3_tx_shift_dqs_adll_step_before_fail()
506 ddr3_pbs_write_pup_dqs_reg(CS0, pup * (1 - ecc) + ECC_PUP * ecc, in ddr3_tx_shift_dqs_adll_step_before_fail()
647 [dq], CS0, in ddr3_pbs_rx()
655 DQ_NUM, CS0, in ddr3_pbs_rx()
702 (PUP_DQS_RD, CS0, in ddr3_pbs_rx()
718 [dq], CS0, in ddr3_pbs_rx()
749 ddr3_write_pup_reg(PUP_DQS_RD, CS0, in ddr3_pbs_rx()
887 ddr3_write_pup_reg(PUP_DQS_RD, CS0, PUP_BC, 0, INIT_RL_DELAY); in ddr3_pbs_rx()
959 ddr3_write_pup_reg(PUP_DQS_RD, CS0, pup + ecc * ECC_PUP, 0, in ddr3_rx_shift_dqs_to_first_fail()
984 ddr3_write_pup_reg(PUP_DQS_RD, CS0, pup + ecc * ECC_PUP, in ddr3_rx_shift_dqs_to_first_fail()
1011 ddr3_write_pup_reg(PUP_PBS_RX + DQS_DQ_NUM, CS0, in ddr3_rx_shift_dqs_to_first_fail()
1047 ddr3_write_pup_reg(PUP_DQS_RD, CS0, in ddr3_rx_shift_dqs_to_first_fail()
1073 ddr3_write_pup_reg(PUP_DQS_RD, CS0, in ddr3_rx_shift_dqs_to_first_fail()
1115 pbs_dq_mapping[idx][dq], CS0, in lock_pups()
1223 CS0, idx, 0, pbs_curr_val); in ddr3_pbs_per_bit()
1227 CS0, idx, 0, pbs_curr_val); in ddr3_pbs_per_bit()
1485 CS0, phys_pup, 0, in ddr3_set_pbs_results()
1496 ddr3_write_pup_reg(PUP_PBS_TX + 8, CS0, phys_pup, 0, in ddr3_set_pbs_results()
1498 ddr3_write_pup_reg(PUP_PBS_TX + 0xa, CS0, phys_pup, 0, in ddr3_set_pbs_results()
1501 ddr3_write_pup_reg(PUP_PBS_RX + 8, CS0, phys_pup, 0, in ddr3_set_pbs_results()