Lines Matching refs:popts
25 extern void fsl_ddr_board_options(memctl_options_t *popts,
740 memctl_options_t *popts, in populate_memctl_options() argument
831 popts->cs_local_opts[i].odt_rd_cfg = pdodt[i].odt_rd_cfg; in populate_memctl_options()
832 popts->cs_local_opts[i].odt_wr_cfg = pdodt[i].odt_wr_cfg; in populate_memctl_options()
833 popts->cs_local_opts[i].odt_rtt_norm = pdodt[i].odt_rtt_norm; in populate_memctl_options()
834 popts->cs_local_opts[i].odt_rtt_wr = pdodt[i].odt_rtt_wr; in populate_memctl_options()
836 popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER; in populate_memctl_options()
837 popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS; in populate_memctl_options()
839 popts->cs_local_opts[i].auto_precharge = 0; in populate_memctl_options()
848 popts->memctl_interleaving = 0; in populate_memctl_options()
856 popts->memctl_interleaving_mode = 0; in populate_memctl_options()
877 popts->ba_intlv_ctl = 0; in populate_memctl_options()
880 popts->registered_dimm_en = common_dimm->all_dimms_registered; in populate_memctl_options()
885 popts->ecc_mode = 0; /* 0 = disabled, 1 = enabled */ in populate_memctl_options()
889 popts->ecc_mode = 1; in populate_memctl_options()
891 popts->ecc_mode = 1; in populate_memctl_options()
894 popts->ecc_init_using_memctl = popts->ecc_mode ? 1 : 0; in populate_memctl_options()
902 popts->dqs_config = 0; in populate_memctl_options()
904 popts->dqs_config = 1; in populate_memctl_options()
908 popts->self_refresh_in_sleep = 1; in populate_memctl_options()
911 popts->dynamic_power = 0; in populate_memctl_options()
922 popts->data_bus_width = 0; in populate_memctl_options()
925 popts->data_bus_width = 1; in populate_memctl_options()
934 popts->data_bus_width = 0; in populate_memctl_options()
936 popts->data_bus_width = 1; in populate_memctl_options()
938 popts->data_bus_width = 2; in populate_memctl_options()
946 popts->x4_en = (pdimm[0].device_width == 4) ? 1 : 0; in populate_memctl_options()
951 popts->otf_burst_chop_en = 0; /* on-the-fly burst chop disable */ in populate_memctl_options()
952 popts->burst_length = DDR_BL8; /* Fixed 8-beat burst len */ in populate_memctl_options()
954 if ((popts->data_bus_width == 1) || (popts->data_bus_width == 2)) { in populate_memctl_options()
956 popts->otf_burst_chop_en = 0; in populate_memctl_options()
957 popts->burst_length = DDR_BL8; in populate_memctl_options()
959 popts->otf_burst_chop_en = 1; /* on-the-fly burst chop */ in populate_memctl_options()
960 popts->burst_length = DDR_OTF; /* on-the-fly BC4 and BL8 */ in populate_memctl_options()
964 popts->burst_length = DDR_BL4; /* has to be 4 for DDR2 */ in populate_memctl_options()
971 popts->mirrored_dimm = pdimm[i].mirrored_dimm; in populate_memctl_options()
981 popts->cas_latency_override = 0; in populate_memctl_options()
982 popts->cas_latency_override_value = 3; in populate_memctl_options()
983 if (popts->cas_latency_override) { in populate_memctl_options()
985 popts->cas_latency_override_value); in populate_memctl_options()
989 popts->use_derated_caslat = 0; in populate_memctl_options()
992 popts->additive_latency_override = 0; in populate_memctl_options()
993 popts->additive_latency_override_value = 3; in populate_memctl_options()
994 if (popts->additive_latency_override) { in populate_memctl_options()
996 popts->additive_latency_override_value); in populate_memctl_options()
1007 popts->twot_en = 0; in populate_memctl_options()
1008 popts->threet_en = 0; in populate_memctl_options()
1011 if (popts->registered_dimm_en) in populate_memctl_options()
1012 popts->ap_en = 1; /* 0 = disable, 1 = enable */ in populate_memctl_options()
1014 popts->ap_en = 0; /* disabled for DDR4 UDIMM/discrete default */ in populate_memctl_options()
1018 if (popts->registered_dimm_en || in populate_memctl_options()
1020 popts->ap_en = 1; in populate_memctl_options()
1033 popts->bstopre = picos_to_mclk(ctrl_num, common_dimm->refresh_rate_ps) in populate_memctl_options()
1044 popts->tfaw_window_four_activates_ps = mclk_to_picos(ctrl_num, 1); in populate_memctl_options()
1051 popts->tfaw_window_four_activates_ps = 37500; in populate_memctl_options()
1054 popts->tfaw_window_four_activates_ps = pdimm[0].tfaw_ps; in populate_memctl_options()
1056 popts->zq_en = 0; in populate_memctl_options()
1057 popts->wrlvl_en = 0; in populate_memctl_options()
1064 popts->wrlvl_en = 1; in populate_memctl_options()
1065 popts->zq_en = 1; in populate_memctl_options()
1066 popts->wrlvl_override = 0; in populate_memctl_options()
1093 popts->memctl_interleaving = 0; in populate_memctl_options()
1096 popts->memctl_interleaving = 1; in populate_memctl_options()
1098 popts->memctl_interleaving_mode = FSL_DDR_256B_INTERLEAVING; in populate_memctl_options()
1099 popts->memctl_interleaving = 1; in populate_memctl_options()
1108 popts->memctl_interleaving = 0; in populate_memctl_options()
1113 popts->memctl_interleaving_mode = in populate_memctl_options()
1116 popts->memctl_interleaving = in populate_memctl_options()
1122 popts->memctl_interleaving_mode = in populate_memctl_options()
1125 popts->memctl_interleaving = in populate_memctl_options()
1131 popts->memctl_interleaving_mode = in populate_memctl_options()
1134 popts->memctl_interleaving = in populate_memctl_options()
1140 popts->memctl_interleaving_mode = in populate_memctl_options()
1143 popts->memctl_interleaving = in populate_memctl_options()
1150 popts->memctl_interleaving_mode = in populate_memctl_options()
1155 popts->memctl_interleaving_mode = in populate_memctl_options()
1160 popts->memctl_interleaving_mode = in populate_memctl_options()
1166 popts->memctl_interleaving_mode = in populate_memctl_options()
1171 popts->memctl_interleaving_mode = in populate_memctl_options()
1176 popts->memctl_interleaving_mode = in populate_memctl_options()
1180 popts->memctl_interleaving = 0; in populate_memctl_options()
1195 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1; in populate_memctl_options()
1198 popts->ba_intlv_ctl = FSL_DDR_CS2_CS3; in populate_memctl_options()
1201 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_AND_CS2_CS3; in populate_memctl_options()
1204 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_CS2_CS3; in populate_memctl_options()
1207 popts->ba_intlv_ctl = auto_bank_intlv(pdimm); in populate_memctl_options()
1210 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in populate_memctl_options()
1214 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1225 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1231 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1240 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1249 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1255 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1264 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1271 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1279 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1286 popts->addr_hash = 0; in populate_memctl_options()
1289 popts->addr_hash = 1; in populate_memctl_options()
1293 popts->quad_rank_present = 1; in populate_memctl_options()
1296 if (popts->registered_dimm_en) { in populate_memctl_options()
1297 popts->rcw_override = 1; in populate_memctl_options()
1298 popts->rcw_1 = 0x000a5a00; in populate_memctl_options()
1300 popts->rcw_2 = 0x00000000; in populate_memctl_options()
1302 popts->rcw_2 = 0x00100000; in populate_memctl_options()
1304 popts->rcw_2 = 0x00200000; in populate_memctl_options()
1306 popts->rcw_2 = 0x00300000; in populate_memctl_options()
1309 fsl_ddr_board_options(popts, pdimm, ctrl_num); in populate_memctl_options()