Lines Matching refs:total_mem
244 unsigned long long total_mem, current_mem_base, total_ctlr_mem; in __step_assign_addresses() local
310 total_mem = 0; in __step_assign_addresses()
355 pinfo->common_timing_params[i].total_mem = in __step_assign_addresses()
357 total_mem = current_mem_base + total_ctlr_mem; in __step_assign_addresses()
362 current_mem_base = total_mem; in __step_assign_addresses()
376 pinfo->common_timing_params[i].total_mem = in __step_assign_addresses()
378 total_mem += total_ctlr_mem; in __step_assign_addresses()
401 pinfo->common_timing_params[i].total_mem = in __step_assign_addresses()
403 total_mem += total_ctlr_mem; in __step_assign_addresses()
406 debug("Total mem by %s is 0x%llx\n", __func__, total_mem); in __step_assign_addresses()
408 return total_mem; in __step_assign_addresses()
421 unsigned long long total_mem = 0; in fsl_ddr_compute() local
562 total_mem = step_assign_addresses(pinfo, dbw_capacity_adjust); in fsl_ddr_compute()
563 debug("Total mem %llu assigned\n", total_mem); in fsl_ddr_compute()
616 total_mem = 1 + (((unsigned long long)max_end << 24ULL) | in fsl_ddr_compute()
620 return total_mem; in fsl_ddr_compute()