54 compute_ranksize(const ddr3_spd_eeprom_t *spd)  in compute_ranksize()  argument
62 	if ((spd->density_banks & 0xf) < 7)  in compute_ranksize()
63 		nbit_sdram_cap_bsize = (spd->density_banks & 0xf) + 28;  in compute_ranksize()
64 	if ((spd->bus_width & 0x7) < 4)  in compute_ranksize()
65 		nbit_primary_bus_width = (spd->bus_width & 0x7) + 3;  in compute_ranksize()
66 	if ((spd->organization & 0x7) < 4)  in compute_ranksize()
67 		nbit_sdram_width = (spd->organization & 0x7) + 2;  in compute_ranksize()
85 					 const ddr3_spd_eeprom_t *spd,  in ddr_compute_dimm_parameters()  argument
94 	if (spd->mem_type) {  in ddr_compute_dimm_parameters()
95 		if (spd->mem_type != SPD_MEMTYPE_DDR3) {  in ddr_compute_dimm_parameters()
104 	retval = ddr3_spd_check(spd);  in ddr_compute_dimm_parameters()
116 	if ((spd->info_size_crc & 0xF) > 1)  in ddr_compute_dimm_parameters()
117 		memcpy(pdimm->mpart, spd->mpart, sizeof(pdimm->mpart) - 1);  in ddr_compute_dimm_parameters()
120 	pdimm->n_ranks = ((spd->organization >> 3) & 0x7) + 1;  in ddr_compute_dimm_parameters()
121 	pdimm->rank_density = compute_ranksize(spd);  in ddr_compute_dimm_parameters()
123 	pdimm->primary_sdram_width = 1 << (3 + (spd->bus_width & 0x7));  in ddr_compute_dimm_parameters()
124 	if ((spd->bus_width >> 3) & 0x3)  in ddr_compute_dimm_parameters()
130 	pdimm->device_width = 1 << ((spd->organization & 0x7) + 2);  in ddr_compute_dimm_parameters()
135 	switch (spd->module_type & DDR3_SPD_MODULETYPE_MASK) {  in ddr_compute_dimm_parameters()
142 			u8 rcw = spd->mod_section.registered.rcw[i/2];  in ddr_compute_dimm_parameters()
159 		if (spd->mod_section.unbuffered.addr_mapping & 0x1)  in ddr_compute_dimm_parameters()
164 		printf("unknown module_type 0x%02X\n", spd->module_type);  in ddr_compute_dimm_parameters()
169 	pdimm->n_row_addr = ((spd->addressing >> 3) & 0x7) + 12;  in ddr_compute_dimm_parameters()
170 	pdimm->n_col_addr = (spd->addressing & 0x7) + 9;  in ddr_compute_dimm_parameters()
171 	pdimm->n_banks_per_sdram_device = 8 << ((spd->density_banks >> 4) & 0x7);  in ddr_compute_dimm_parameters()
196 	mtb_ps = (spd->mtb_dividend * 1000) /spd->mtb_divisor;  in ddr_compute_dimm_parameters()
205 		((spd->ftb_div & 0xf0) >> 4) * 10 / (spd->ftb_div & 0x0f);  in ddr_compute_dimm_parameters()
215 	pdimm->tckmin_x_ps = spd->tck_min * mtb_ps +  in ddr_compute_dimm_parameters()
216 		(spd->fine_tck_min * ftb_10th_ps) / 10;  in ddr_compute_dimm_parameters()
224 	pdimm->caslat_x  = ((spd->caslat_msb << 8) | spd->caslat_lsb) << 4;  in ddr_compute_dimm_parameters()
234 	pdimm->taa_ps = spd->taa_min * mtb_ps +  in ddr_compute_dimm_parameters()
235 		(spd->fine_taa_min * ftb_10th_ps) / 10;  in ddr_compute_dimm_parameters()
242 	pdimm->twr_ps = spd->twr_min * mtb_ps;  in ddr_compute_dimm_parameters()
252 	pdimm->trcd_ps = spd->trcd_min * mtb_ps +  in ddr_compute_dimm_parameters()
253 		(spd->fine_trcd_min * ftb_10th_ps) / 10;  in ddr_compute_dimm_parameters()
261 	pdimm->trrd_ps = spd->trrd_min * mtb_ps;  in ddr_compute_dimm_parameters()
271 	pdimm->trp_ps = spd->trp_min * mtb_ps +  in ddr_compute_dimm_parameters()
272 		(spd->fine_trp_min * ftb_10th_ps) / 10;  in ddr_compute_dimm_parameters()
281 	pdimm->tras_ps = (((spd->tras_trc_ext & 0xf) << 8) | spd->tras_min_lsb)  in ddr_compute_dimm_parameters()
291 	pdimm->trc_ps = (((spd->tras_trc_ext & 0xf0) << 4) | spd->trc_min_lsb)  in ddr_compute_dimm_parameters()
292 			* mtb_ps + (spd->fine_trc_min * ftb_10th_ps) / 10;  in ddr_compute_dimm_parameters()
300 	pdimm->trfc_ps = ((spd->trfc_min_msb << 8) | spd->trfc_min_lsb)  in ddr_compute_dimm_parameters()
307 	pdimm->twtr_ps = spd->twtr_min * mtb_ps;  in ddr_compute_dimm_parameters()
314 	pdimm->trtp_ps = spd->trtp_min * mtb_ps;  in ddr_compute_dimm_parameters()
322 	if ((spd->therm_ref_opt & 0x1) && !(spd->therm_ref_opt & 0x2)) {  in ddr_compute_dimm_parameters()
335 	pdimm->tfaw_ps = (((spd->tfaw_msb & 0xf) << 8) | spd->tfaw_min)  in ddr_compute_dimm_parameters()