52 #define DLEVEL 0  macro
280 		debug_cond(DLEVEL >= 1, "%s:%d: Clearing SCC RFILE index %u\n",  in scc_mgr_initialize()
482 	debug_cond(DLEVEL >= 1, "%s:%d Setting HHP Extras\n",  in scc_mgr_set_hhp_extras()
485 	debug_cond(DLEVEL >= 1, "%s:%d Done Setting HHP Extras\n",  in scc_mgr_set_hhp_extras()
696 		debug_cond(DLEVEL >= 1,  in scc_mgr_apply_group_all_out_delay_add()
710 		debug_cond(DLEVEL >= 1,  in scc_mgr_apply_group_all_out_delay_add()
1213 		debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_write_test()
1220 		debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_write_test()
1295 	debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_read_test_patterns()
1456 		debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_read_test()
1462 		debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_read_test()
1526 		debug_cond(DLEVEL >= 2, "%s:%d: vfifo %u\n",  in find_vfifo_failing_read()
1542 	debug_cond(DLEVEL >= 2, "%s:%d: vfifo failed\n", __func__, __LINE__);  in find_vfifo_failing_read()
1649 	debug_cond(DLEVEL >= 2, "%s:%d find_dqs_en_phase: no vfifo/ptap/dtap\n",  in sdr_working_phase()
1725 		debug_cond(DLEVEL >= 2, "%s:%d: end: failed\n",  in sdr_nonworking_phase()
1749 	debug_cond(DLEVEL >= 2, "work_bgn=%d work_end=%d work_mid=%d\n",  in sdr_find_window_center()
1754 	debug_cond(DLEVEL >= 2, "vfifo ptap delay %d\n", tmp_delay);  in sdr_find_window_center()
1756 	debug_cond(DLEVEL >= 2, "new work_mid %d\n", work_mid);  in sdr_find_window_center()
1763 	debug_cond(DLEVEL >= 2, "new p %d, tmp_delay=%d\n", p, tmp_delay);  in sdr_find_window_center()
1771 	debug_cond(DLEVEL >= 2, "new d %d, tmp_delay=%d\n", d, tmp_delay);  in sdr_find_window_center()
1781 		debug_cond(DLEVEL >= 2, "find_dqs_en_phase: center\n");  in sdr_find_window_center()
1785 			debug_cond(DLEVEL >= 2,  in sdr_find_window_center()
1795 	debug_cond(DLEVEL >= 2, "%s:%d center: failed.\n",  in sdr_find_window_center()
1871 		debug_cond(DLEVEL >= 2, "%s:%d p: ptap=%u\n",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1883 	debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1889 		debug_cond(DLEVEL >= 2, "%s:%d end-2: failed\n",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1894 	debug_cond(DLEVEL >= 2, "%s:%d found range [%u,%u]\n",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1902 	debug_cond(DLEVEL >= 2, "%s:%d calculate dtaps_per_ptap for tracking\n",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1909 		debug_cond(DLEVEL >= 2, "%s:%d backedup cycle/phase: p=%u\n",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1913 		debug_cond(DLEVEL >= 2, "%s:%d backedup phase only: p=%u",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1926 	debug_cond(DLEVEL >= 2, "%s:%d find passing read\n",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1934 		debug_cond(DLEVEL >= 2, "%s:%d find failing read\n",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1940 		debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
1955 	debug_cond(DLEVEL >= 2, "%s:%d dtaps_per_ptap=%u - %u = %u",  in rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase()
2011 	debug_cond(DLEVEL >= 2,  in search_stop_check()
2090 		debug_cond(DLEVEL >= 2,  in search_left_edge()
2103 			debug_cond(DLEVEL >= 2,  in search_left_edge()
2233 			debug_cond(DLEVEL >= 2, "%s:%d center[r,d=%u]: ",  in search_right_edge()
2235 			debug_cond(DLEVEL >= 2,  in search_right_edge()
2238 			debug_cond(DLEVEL >= 2, "right_edge[%u]: %d\n", i,  in search_right_edge()
2246 		debug_cond(DLEVEL >= 2,  in search_right_edge()
2295 	debug_cond(DLEVEL >= 1, "%s:%d vfifo_center: *mid_min=%d (index=%u)\n",  in get_window_mid_index()
2341 		debug_cond(DLEVEL >= 2,  in center_dq_windows()
2352 		debug_cond(DLEVEL >= 2,  in center_dq_windows()
2365 		debug_cond(DLEVEL >= 2,  in center_dq_windows()
2447 		debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_vfifo_center()
2475 	debug_cond(DLEVEL >= 1, "vfifo_center: new mid_min=%d new_dqs=%d\n",  in rw_mgr_mem_calibrate_vfifo_center()
2487 	debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_vfifo_center()
2507 	debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_vfifo_center()
2540 	debug_cond(DLEVEL >= 1, "%s:%d guaranteed write: g=%u p=%u\n",  in rw_mgr_mem_calibrate_guaranteed_write()
2559 		debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_guaranteed_write()
2595 			debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_dqs_enable_calibration()
2612 	debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_dqs_enable_calibration()
2818 		debug_cond(DLEVEL >= 2, "%s:%d lfifo: read_lat=%u",  in rw_mgr_mem_calibrate_lfifo()
2840 		debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_lfifo()
2847 		debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_lfifo()
3010 	debug_cond(DLEVEL >= 1,  in rw_mgr_mem_calibrate_writes_center()
3023 	debug_cond(DLEVEL >= 2, "%s:%d write_center: DM\n", __func__, __LINE__);  in rw_mgr_mem_calibrate_writes_center()
3057 	debug_cond(DLEVEL >= 2, "%s:%d dm_calib: left=%d right=%d\n",  in rw_mgr_mem_calibrate_writes_center()
3081 	debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_writes_center()
3088 	debug_cond(DLEVEL >= 2,  in rw_mgr_mem_calibrate_writes_center()
3747 	debug_cond(DLEVEL >= 1,  in sdram_calibration_full()
3753 	debug_cond(DLEVEL >= 1,  in sdram_calibration_full()
3758 	debug_cond(DLEVEL >= 1, "dtap_dqsen_delay=%u, dll=%u",  in sdram_calibration_full()
3760 	debug_cond(DLEVEL >= 1,  in sdram_calibration_full()
3764 	debug_cond(DLEVEL >= 1, "io_in_d=%u io_out1_d=%u io_out2_d=%u ",  in sdram_calibration_full()
3767 	debug_cond(DLEVEL >= 1, "dqs_in_reserve=%u dqs_out_reserve=%u\n",  in sdram_calibration_full()