200 	rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,  in rv1126_rtc32k_set_pmuclk()
246 		rk_clrsetreg(&pmucru->pmu_clksel_con[2], CLK_I2C0_DIV_MASK,  in rv1126_i2c_set_pmuclk()
250 		rk_clrsetreg(&pmucru->pmu_clksel_con[3], CLK_I2C2_DIV_MASK,  in rv1126_i2c_set_pmuclk()
297 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
300 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
305 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
308 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
315 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
318 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
323 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
326 			rk_clrsetreg(&pmucru->pmu_clksel_con[6],  in rv1126_pwm_set_pmuclk()
358 	rk_clrsetreg(&pmucru->pmu_clksel_con[9],  in rv1126_spi_set_pmuclk()
386 	rk_clrsetreg(&pmucru->pmu_clksel_con[1],  in rv1126_pdpmu_set_pmuclk()
477 		rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,  in rv1126_rtc32k_set_parent()
480 		rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,  in rv1126_rtc32k_set_parent()
579 		rk_clrsetreg(&cru->clksel_con[1],  in rv1126_armclk_set_clk()
584 		rk_clrsetreg(&cru->clksel_con[1],  in rv1126_armclk_set_clk()
614 	rk_clrsetreg(&cru->clksel_con[0], CORE_HCLK_DIV_MASK,  in rv1126_pdcore_set_clk()
683 		rk_clrsetreg(&cru->clksel_con[2],  in rv1126_pdbus_set_clk()
691 		rk_clrsetreg(&cru->clksel_con[2],  in rv1126_pdbus_set_clk()
700 		rk_clrsetreg(&cru->clksel_con[3],  in rv1126_pdbus_set_clk()
748 		rk_clrsetreg(&cru->clksel_con[53],  in rv1126_pdphp_set_clk()
754 		rk_clrsetreg(&cru->clksel_con[53],  in rv1126_pdphp_set_clk()
785 	rk_clrsetreg(&cru->clksel_con[26], HCLK_PDAUDIO_DIV_MASK,  in rv1126_pdaudio_set_clk()
831 		rk_clrsetreg(&cru->clksel_con[5], CLK_I2C1_DIV_MASK,  in rv1126_i2c_set_clk()
835 		rk_clrsetreg(&cru->clksel_con[5], CLK_I2C3_DIV_MASK,  in rv1126_i2c_set_clk()
839 		rk_clrsetreg(&cru->clksel_con[6], CLK_I2C4_DIV_MASK,  in rv1126_i2c_set_clk()
843 		rk_clrsetreg(&cru->clksel_con[6], CLK_I2C5_DIV_MASK,  in rv1126_i2c_set_clk()
872 	rk_clrsetreg(&cru->clksel_con[8],  in rv1126_spi_set_clk()
900 		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_SEL_MASK,  in rv1126_pwm_set_clk()
902 		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_DIV_MASK, 0);  in rv1126_pwm_set_clk()
906 		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_DIV_MASK,  in rv1126_pwm_set_clk()
908 		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_SEL_MASK,  in rv1126_pwm_set_clk()
933 	rk_clrsetreg(&cru->clksel_con[20], CLK_SARADC_DIV_MASK,  in rv1126_saradc_set_clk()
996 		rk_clrsetreg(&cru->clksel_con[7],  in rv1126_crypto_set_clk()
1004 		rk_clrsetreg(&cru->clksel_con[7],  in rv1126_crypto_set_clk()
1012 		rk_clrsetreg(&cru->clksel_con[4],  in rv1126_crypto_set_clk()
1091 		rk_clrsetreg(&cru->clksel_con[con_id],  in rv1126_mmc_set_clk()
1096 		rk_clrsetreg(&cru->clksel_con[con_id],  in rv1126_mmc_set_clk()
1129 	rk_clrsetreg(&cru->clksel_con[58],  in rv1126_sfc_set_clk()
1161 	rk_clrsetreg(&cru->clksel_con[59],  in rv1126_nand_set_clk()
1194 	rk_clrsetreg(&cru->clksel_con[45],  in rv1126_aclk_vop_set_clk()
1253 		rk_clrsetreg(&cru->clksel_con[47],  in rv1126_dclk_vop_set_clk()
1291 	rk_clrsetreg(&cru->clksel_con[3],  in rv1126_scr1_set_clk()
1324 	rk_clrsetreg(&cru->clksel_con[63],  in rv1126_gmac_src_set_clk()
1357 	rk_clrsetreg(&cru->clksel_con[61],  in rv1126_gmac_out_set_clk()
1380 		rk_clrsetreg(&cru->gmac_con, RGMII_CLK_SEL_MASK,  in rv1126_gmac_tx_rx_set_clk()
1387 		rk_clrsetreg(&cru->gmac_con, RMII_CLK_SEL_MASK,  in rv1126_gmac_tx_rx_set_clk()
1435 		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_SEL_MASK,  in rv1126_clk_mipicsi_out_set_clk()
1439 		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_DIV_MASK,  in rv1126_clk_mipicsi_out_set_clk()
1441 		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_SEL_MASK,  in rv1126_clk_mipicsi_out_set_clk()
1447 		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_DIV_MASK,  in rv1126_clk_mipicsi_out_set_clk()
1449 		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_SEL_MASK,  in rv1126_clk_mipicsi_out_set_clk()
1524 	rk_clrsetreg(&cru->clksel_con[con_id],  in rv1126_clk_pdvi_ispp_set_clk()
1570 	rk_clrsetreg(&cru->clksel_con[50],  in rv1126_clk_isp_set_clk()
1604 	rk_clrsetreg(&cru->clksel_con[25],  in rv1126_dclk_decom_set_clk()
1984 		rk_clrsetreg(&grf->iofunc_con1, GMAC_SRC_SEL_MASK,  in rv1126_gmac_src_set_parent()
1987 		rk_clrsetreg(&grf->iofunc_con1, GMAC_SRC_SEL_MASK,  in rv1126_gmac_src_set_parent()
1999 		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,  in rv1126_gmac_src_m0_set_parent()
2002 		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,  in rv1126_gmac_src_m0_set_parent()
2014 		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M1_SEL_MASK,  in rv1126_gmac_src_m1_set_parent()
2017 		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M1_SEL_MASK,  in rv1126_gmac_src_m1_set_parent()
2029 		rk_clrsetreg(&cru->gmac_con, GMAC_MODE_SEL_MASK,  in rv1126_gmac_tx_rx_set_parent()
2032 		rk_clrsetreg(&cru->gmac_con, GMAC_MODE_SEL_MASK,  in rv1126_gmac_tx_rx_set_parent()