232 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_i2c_get_pmuclk()
241 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_i2c_set_pmuclk()
285 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_pwm_get_pmuclk()
303 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pwm_set_pmuclk()
321 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pwm_set_pmuclk()
346 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_spi_get_pmuclk()
355 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_spi_set_pmuclk()
374 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_pdpmu_get_pmuclk()
383 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pdpmu_set_pmuclk()
398 	if (!priv->gpll_hz) {  in rv1126_pmuclk_get_rate()
399 		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);  in rv1126_pmuclk_get_rate()
437 	if (!priv->gpll_hz) {  in rv1126_pmuclk_set_rate()
438 		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);  in rv1126_pmuclk_set_rate()
505 	priv->gpll_hz =	rv1126_gpll_get_pmuclk(priv);  in rv1126_pmuclk_probe()
604 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_pdcore_get_clk()
611 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pdcore_set_clk()
631 			parent = priv->gpll_hz;  in rv1126_pdbus_get_clk()
642 			parent = priv->gpll_hz;  in rv1126_pdbus_get_clk()
654 			parent = priv->gpll_hz;  in rv1126_pdbus_get_clk()
676 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pdbus_set_clk()
689 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pdbus_set_clk()
698 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pdbus_set_clk()
723 		parent = priv->gpll_hz;  in rv1126_pdphp_get_clk()
728 		parent = priv->gpll_hz;  in rv1126_pdphp_get_clk()
743 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pdphp_set_clk()
774 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_pdaudio_get_clk()
782 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pdaudio_set_clk()
817 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_i2c_get_clk()
826 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_i2c_set_clk()
861 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_spi_get_clk()
869 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_spi_set_clk()
891 	return DIV_TO_RATE(priv->gpll_hz, div);  in rv1126_pwm_get_clk()
904 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_pwm_set_clk()
950 			parent = priv->gpll_hz;  in rv1126_crypto_get_clk()
961 			parent = priv->gpll_hz;  in rv1126_crypto_get_clk()
972 			parent = priv->gpll_hz;  in rv1126_crypto_get_clk()
991 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_crypto_set_clk()
1051 		return DIV_TO_RATE(priv->gpll_hz, div) / 2;  in rv1126_mmc_get_clk()
1086 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, rate);  in rv1126_mmc_set_clk()
1114 		parent = priv->gpll_hz;  in rv1126_sfc_get_clk()
1128 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_sfc_set_clk()
1146 		parent = priv->gpll_hz;  in rv1126_nand_get_clk()
1160 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_nand_set_clk()
1178 		parent = priv->gpll_hz;  in rv1126_aclk_vop_get_clk()
1192 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_aclk_vop_set_clk()
1211 		parent = priv->gpll_hz;  in rv1126_dclk_vop_get_clk()
1229 			pll_rate = priv->gpll_hz;  in rv1126_dclk_vop_set_clk()
1275 		parent = priv->gpll_hz;  in rv1126_scr1_get_clk()
1289 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_scr1_set_clk()
1310 		parent = priv->gpll_hz;  in rv1126_gmac_src_get_clk()
1343 		parent = priv->gpll_hz;  in rv1126_gmac_out_get_clk()
1411 	u32 div, fracdiv, sel, con, n, m, parent = priv->gpll_hz;  in rv1126_clk_mipicsi_out_get_clk()
1438 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, 297000000);  in rv1126_clk_mipicsi_out_set_clk()
1445 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_clk_mipicsi_out_set_clk()
1480 		parent = priv->gpll_hz;  in rv1126_clk_pdvi_ispp_get_clk()
1518 		parent = priv->gpll_hz;  in rv1126_clk_pdvi_ispp_set_clk()
1541 		parent = priv->gpll_hz;  in rv1126_clk_isp_get_clk()
1564 		parent = priv->gpll_hz;  in rv1126_clk_isp_set_clk()
1588 		parent = priv->gpll_hz;  in rv1126_dclk_decom_get_clk()
1602 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rv1126_dclk_decom_set_clk()
1617 	if (!priv->gpll_hz) {  in rv1126_clk_get_rate()
1618 		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);  in rv1126_clk_get_rate()
1738 	if (!priv->gpll_hz) {  in rv1126_clk_set_rate()
1739 		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);  in rv1126_clk_set_rate()
2074 	if (priv->gpll_hz != OSC_HZ) {  in rv1126_gpll_set_rate()
2090 	pmu_priv->gpll_hz = rate;  in rv1126_gpll_set_rate()
2091 	priv->gpll_hz = rate;  in rv1126_gpll_set_rate()
2116 	priv->gpll_hz = pmu_priv->gpll_hz;  in rv1126_gpll_set_clk()
2158 	if (priv->gpll_hz != GPLL_HZ)  in rv1126_clk_init()