31 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\  argument
200 static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_saradc_set_clk()
225 static ulong rv1108_aclk_vio1_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_aclk_vio1_set_clk()
251 static ulong rv1108_aclk_vio0_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_aclk_vio0_set_clk()
286 static ulong rv1108_dclk_vop_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_dclk_vop_set_clk()
315 static ulong rv1108_aclk_bus_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_aclk_bus_set_clk()
367 static ulong rv1108_aclk_peri_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_aclk_peri_set_clk()
383 static ulong rv1108_hclk_peri_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_hclk_peri_set_clk()
398 static ulong rv1108_pclk_peri_set_clk(struct rv1108_cru *cru, uint hz)  in rv1108_pclk_peri_set_clk()
446 static ulong rv1108_i2c_set_clk(struct rv1108_cru *cru, ulong clk_id, uint hz)  in rv1108_i2c_set_clk()
497 static ulong  rv1108_spi_set_clk(struct rv1108_cru *cru, ulong hz)  in rv1108_spi_set_clk()