Lines Matching refs:sel
79 u32 con, sel, rate; in rv1106_peri_get_clk() local
84 sel = (con & ACLK_PERI_SEL_MASK) >> ACLK_PERI_SEL_SHIFT; in rv1106_peri_get_clk()
85 if (sel == ACLK_PERI_SEL_400M) in rv1106_peri_get_clk()
87 else if (sel == ACLK_PERI_SEL_200M) in rv1106_peri_get_clk()
89 else if (sel == ACLK_PERI_SEL_100M) in rv1106_peri_get_clk()
96 sel = (con & HCLK_PERI_SEL_MASK) >> HCLK_PERI_SEL_SHIFT; in rv1106_peri_get_clk()
97 if (sel == HCLK_PERI_SEL_200M) in rv1106_peri_get_clk()
99 else if (sel == HCLK_PERI_SEL_100M) in rv1106_peri_get_clk()
101 else if (sel == HCLK_PERI_SEL_50M) in rv1106_peri_get_clk()
108 sel = (con & PCLK_PERI_SEL_MASK) >> PCLK_PERI_SEL_SHIFT; in rv1106_peri_get_clk()
109 if (sel == PCLK_PERI_SEL_100M) in rv1106_peri_get_clk()
111 else if (sel == PCLK_PERI_SEL_50M) in rv1106_peri_get_clk()
118 sel = (con & ACLK_BUS_SEL_MASK) >> ACLK_BUS_SEL_SHIFT; in rv1106_peri_get_clk()
119 if (sel == ACLK_BUS_SEL_300M) in rv1106_peri_get_clk()
121 else if (sel == ACLK_BUS_SEL_200M) in rv1106_peri_get_clk()
123 else if (sel == ACLK_BUS_SEL_100M) in rv1106_peri_get_clk()
130 sel = (con & PCLK_TOP_SEL_MASK) >> PCLK_TOP_SEL_SHIFT; in rv1106_peri_get_clk()
131 if (sel == PCLK_TOP_SEL_100M) in rv1106_peri_get_clk()
133 else if (sel == PCLK_TOP_SEL_50M) in rv1106_peri_get_clk()
140 sel = (con & PCLK_PMU_SEL_MASK) >> PCLK_PMU_SEL_SHIFT; in rv1106_peri_get_clk()
141 if (sel == PCLK_PMU_SEL_100M) in rv1106_peri_get_clk()
148 sel = (con & HCLK_PMU_SEL_MASK) >> HCLK_PMU_SEL_SHIFT; in rv1106_peri_get_clk()
149 if (sel == HCLK_PMU_SEL_200M) in rv1106_peri_get_clk()
151 else if (sel == HCLK_PMU_SEL_100M) in rv1106_peri_get_clk()
262 u32 sel, con; in rv1106_i2c_get_clk() local
268 sel = (con & CLK_I2C1_SEL_MASK) >> CLK_I2C1_SEL_SHIFT; in rv1106_i2c_get_clk()
269 if (sel == CLK_I2C1_SEL_200M) in rv1106_i2c_get_clk()
271 else if (sel == CLK_I2C1_SEL_100M) in rv1106_i2c_get_clk()
273 else if (sel == CLK_I2C1_SEL_24M) in rv1106_i2c_get_clk()
280 sel = (con & CLK_I2C0_SEL_MASK) >> CLK_I2C0_SEL_SHIFT; in rv1106_i2c_get_clk()
284 sel = (con & CLK_I2C2_SEL_MASK) >> CLK_I2C2_SEL_SHIFT; in rv1106_i2c_get_clk()
288 sel = (con & CLK_I2C3_SEL_MASK) >> CLK_I2C3_SEL_SHIFT; in rv1106_i2c_get_clk()
292 sel = (con & CLK_I2C4_SEL_MASK) >> CLK_I2C4_SEL_SHIFT; in rv1106_i2c_get_clk()
298 if (sel == CLK_I2C0_SEL_200M) in rv1106_i2c_get_clk()
300 else if (sel == CLK_I2C0_SEL_100M) in rv1106_i2c_get_clk()
302 else if (sel == CLK_I2C0_SEL_50M) in rv1106_i2c_get_clk()
314 u32 sel, con; in rv1106_crypto_get_clk() local
319 sel = (con & CLK_CORE_CRYPTO_SEL_MASK) >> in rv1106_crypto_get_clk()
324 sel = (con & CLK_PKA_CRYPTO_SEL_MASK) >> in rv1106_crypto_get_clk()
330 switch (sel) { in rv1106_crypto_get_clk()
348 u32 sel; in rv1106_crypto_set_clk() local
351 sel = CLK_CRYPTO_SEL_300M; in rv1106_crypto_set_clk()
353 sel = CLK_CRYPTO_SEL_200M; in rv1106_crypto_set_clk()
355 sel = CLK_CRYPTO_SEL_100M; in rv1106_crypto_set_clk()
357 sel = CLK_CRYPTO_SEL_24M; in rv1106_crypto_set_clk()
363 sel << CLK_CORE_CRYPTO_SEL_SHIFT); in rv1106_crypto_set_clk()
368 sel << CLK_PKA_CRYPTO_SEL_SHIFT); in rv1106_crypto_set_clk()
379 u32 div, sel, con, prate; in rv1106_mmc_get_clk() local
385 sel = (con & CLK_SDMMC_SEL_MASK) >> in rv1106_mmc_get_clk()
389 if (sel == CLK_MMC_SEL_400M) in rv1106_mmc_get_clk()
397 sel = (con & CLK_EMMC_SEL_MASK) >> in rv1106_mmc_get_clk()
401 if (sel) in rv1106_mmc_get_clk()
409 sel = (con & CLK_SFC_SEL_MASK) >> in rv1106_mmc_get_clk()
413 if (sel == CLK_SFC_SEL_500M) in rv1106_mmc_get_clk()
415 else if (sel == CLK_SFC_SEL_300M) in rv1106_mmc_get_clk()
417 else if (sel == CLK_SFC_SEL_200M) in rv1106_mmc_get_clk()
431 u32 sel, src_clk_div; in rv1106_mmc_set_clk() local
435 sel = CLK_MMC_SEL_24M; in rv1106_mmc_set_clk()
438 sel = CLK_MMC_SEL_400M; in rv1106_mmc_set_clk()
447 sel = CLK_MMC_SEL_24M; in rv1106_mmc_set_clk()
450 sel = CLK_MMC_SEL_400M; in rv1106_mmc_set_clk()
457 (sel << CLK_SDMMC_SEL_SHIFT) | in rv1106_mmc_set_clk()
464 sel = CLK_MMC_SEL_24M; in rv1106_mmc_set_clk()
467 sel = CLK_MMC_SEL_400M; in rv1106_mmc_set_clk()
474 (sel << CLK_EMMC_SEL_SHIFT) | in rv1106_mmc_set_clk()
481 sel = CLK_SFC_SEL_24M; in rv1106_mmc_set_clk()
484 sel = CLK_SFC_SEL_500M; in rv1106_mmc_set_clk()
487 sel = CLK_SFC_SEL_300M; in rv1106_mmc_set_clk()
490 sel = CLK_SFC_SEL_200M; in rv1106_mmc_set_clk()
497 (sel << CLK_SFC_SEL_SHIFT) | in rv1106_mmc_set_clk()
563 u32 sel, con, rate; in rv1106_spi_get_clk() local
568 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rv1106_spi_get_clk()
572 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rv1106_spi_get_clk()
577 if (sel == CLK_SPI0_SEL_200M) in rv1106_spi_get_clk()
579 else if (sel == CLK_SPI0_SEL_100M) in rv1106_spi_get_clk()
581 else if (sel == CLK_SPI0_SEL_50M) in rv1106_spi_get_clk()
624 u32 sel, con; in rv1106_pwm_get_clk() local
629 sel = (con & CLK_PWM0_SEL_MASK) >> CLK_PWM0_SEL_SHIFT; in rv1106_pwm_get_clk()
633 sel = (con & CLK_PWM1_SEL_MASK) >> CLK_PWM1_SEL_SHIFT; in rv1106_pwm_get_clk()
637 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rv1106_pwm_get_clk()
643 switch (sel) { in rv1106_pwm_get_clk()
928 u32 div, sel, con; in rv1106_vop_get_clk() local
934 sel = (con & ACLK_VOP_SEL_MASK) >> ACLK_VOP_SEL_SHIFT; in rv1106_vop_get_clk()
935 if (sel == ACLK_VOP_SEL_300M) in rv1106_vop_get_clk()
937 else if (sel == ACLK_VOP_SEL_200M) in rv1106_vop_get_clk()
939 else if (sel == ACLK_VOP_SEL_100M) in rv1106_vop_get_clk()
946 sel = (con & DCLK_VOP_SEL_MASK) >> DCLK_VOP_SEL_SHIFT; in rv1106_vop_get_clk()
948 if (sel == DCLK_VOP_SEL_GPLL) in rv1106_vop_get_clk()
961 int div, sel; in rv1106_vop_set_clk() local
967 sel = ACLK_VOP_SEL_300M; in rv1106_vop_set_clk()
969 sel = ACLK_VOP_SEL_200M; in rv1106_vop_set_clk()
971 sel = ACLK_VOP_SEL_100M; in rv1106_vop_set_clk()
973 sel = ACLK_VOP_SEL_24M; in rv1106_vop_set_clk()
976 sel << ACLK_VOP_SEL_SHIFT); in rv1106_vop_set_clk()
981 sel = DCLK_VOP_SEL_CPLL; in rv1106_vop_set_clk()
984 sel = DCLK_VOP_SEL_GPLL; in rv1106_vop_set_clk()
990 sel << DCLK_VOP_SEL_SHIFT | in rv1106_vop_set_clk()
1003 u32 sel, con, prate; in rv1106_decom_get_clk() local
1006 sel = (con & DCLK_DECOM_SEL_MASK) >> in rv1106_decom_get_clk()
1008 if (sel == DCLK_DECOM_SEL_400M) in rv1106_decom_get_clk()
1010 else if (sel == DCLK_DECOM_SEL_200M) in rv1106_decom_get_clk()
1012 else if (sel == DCLK_DECOM_SEL_100M) in rv1106_decom_get_clk()
1022 u32 sel; in rv1106_decom_set_clk() local
1025 sel = DCLK_DECOM_SEL_400M; in rv1106_decom_set_clk()
1027 sel = DCLK_DECOM_SEL_200M; in rv1106_decom_set_clk()
1029 sel = DCLK_DECOM_SEL_100M; in rv1106_decom_set_clk()
1031 sel = DCLK_DECOM_SEL_24M; in rv1106_decom_set_clk()
1033 (sel << DCLK_DECOM_SEL_SHIFT)); in rv1106_decom_set_clk()