231 		rk_clrsetreg(&cru->clksel_con[165],  in rk3588_center_set_clk()
244 		rk_clrsetreg(&cru->clksel_con[165],  in rk3588_center_set_clk()
257 		rk_clrsetreg(&cru->clksel_con[165],  in rk3588_center_set_clk()
270 		rk_clrsetreg(&cru->clksel_con[165],  in rk3588_center_set_clk()
343 		rk_clrsetreg(&cru->clksel_con[8],  in rk3588_top_set_clk()
353 		rk_clrsetreg(&cru->clksel_con[8],  in rk3588_top_set_clk()
367 		rk_clrsetreg(&cru->clksel_con[8],  in rk3588_top_set_clk()
446 		rk_clrsetreg(&cru->pmuclksel_con[3], CLK_I2C0_SEL_MASK,  in rk3588_i2c_set_clk()
450 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C1_SEL_MASK,  in rk3588_i2c_set_clk()
454 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C2_SEL_MASK,  in rk3588_i2c_set_clk()
458 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C3_SEL_MASK,  in rk3588_i2c_set_clk()
462 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C4_SEL_MASK,  in rk3588_i2c_set_clk()
466 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C5_SEL_MASK,  in rk3588_i2c_set_clk()
470 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C6_SEL_MASK,  in rk3588_i2c_set_clk()
474 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C7_SEL_MASK,  in rk3588_i2c_set_clk()
478 		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C8_SEL_MASK,  in rk3588_i2c_set_clk()
542 		rk_clrsetreg(&cru->clksel_con[59],  in rk3588_spi_set_clk()
547 		rk_clrsetreg(&cru->clksel_con[59],  in rk3588_spi_set_clk()
552 		rk_clrsetreg(&cru->clksel_con[59],  in rk3588_spi_set_clk()
557 		rk_clrsetreg(&cru->clksel_con[59],  in rk3588_spi_set_clk()
562 		rk_clrsetreg(&cru->clksel_con[59],  in rk3588_spi_set_clk()
626 		rk_clrsetreg(&cru->clksel_con[59],  in rk3588_pwm_set_clk()
631 		rk_clrsetreg(&cru->clksel_con[59],  in rk3588_pwm_set_clk()
636 		rk_clrsetreg(&cru->clksel_con[60],  in rk3588_pwm_set_clk()
641 		rk_clrsetreg(&cru->pmuclksel_con[2],  in rk3588_pwm_set_clk()
695 			rk_clrsetreg(&cru->clksel_con[40],  in rk3588_adc_set_clk()
705 			rk_clrsetreg(&cru->clksel_con[40],  in rk3588_adc_set_clk()
718 			rk_clrsetreg(&cru->clksel_con[41],  in rk3588_adc_set_clk()
728 			rk_clrsetreg(&cru->clksel_con[41],  in rk3588_adc_set_clk()
855 		rk_clrsetreg(&cru->clksel_con[172],  in rk3588_mmc_set_clk()
862 		rk_clrsetreg(&cru->clksel_con[77],  in rk3588_mmc_set_clk()
869 		rk_clrsetreg(&cru->clksel_con[78],  in rk3588_mmc_set_clk()
876 		rk_clrsetreg(&cru->clksel_con[78],  in rk3588_mmc_set_clk()
883 		rk_clrsetreg(&cru->clksel_con[62],  in rk3588_mmc_set_clk()
932 		rk_clrsetreg(&cru->clksel_con[117], CLK_AUX16MHZ_0_DIV_MASK,  in rk3588_aux16m_set_clk()
936 		rk_clrsetreg(&cru->clksel_con[117], CLK_AUX16MHZ_1_DIV_MASK,  in rk3588_aux16m_set_clk()
1021 		rk_clrsetreg(&cru->clksel_con[110],  in rk3588_aclk_vop_set_clk()
1036 		rk_clrsetreg(&cru->clksel_con[110],  in rk3588_aclk_vop_set_clk()
1049 		rk_clrsetreg(&cru->clksel_con[110],  in rk3588_aclk_vop_set_clk()
1161 			rk_clrsetreg(&cru->clksel_con[conid],  in rk3588_dclk_vop_set_clk()
1167 			rk_clrsetreg(&cru->clksel_con[conid],  in rk3588_dclk_vop_set_clk()
1208 			rk_clrsetreg(&cru->clksel_con[conid],  in rk3588_dclk_vop_set_clk()
1257 		rk_clrsetreg(&cru->clksel_con[81],  in rk3588_gmac_set_clk()
1263 		rk_clrsetreg(&cru->clksel_con[81],  in rk3588_gmac_set_clk()
1270 		rk_clrsetreg(&cru->clksel_con[83],  in rk3588_gmac_set_clk()
1276 		rk_clrsetreg(&cru->clksel_con[84],  in rk3588_gmac_set_clk()
1409 	rk_clrsetreg(&cru->clksel_con[reg],  in rk3588_uart_set_rate()
1414 	rk_clrsetreg(&cru->clksel_con[reg + 2],  in rk3588_uart_set_rate()
1475 		rk_clrsetreg(&cru->clksel_con[177],  in rk3588_pciephy_set_rate()
1478 		rk_clrsetreg(&cru->clksel_con[176],  in rk3588_pciephy_set_rate()
1483 		rk_clrsetreg(&cru->clksel_con[177],  in rk3588_pciephy_set_rate()
1486 		rk_clrsetreg(&cru->clksel_con[176],  in rk3588_pciephy_set_rate()
1491 		rk_clrsetreg(&cru->clksel_con[177],  in rk3588_pciephy_set_rate()
1942 		rk_clrsetreg(&cru->clksel_con[111], DCLK0_VOP_SRC_SEL_MASK,  in rk3588_dclk_vop_set_parent()
1946 		rk_clrsetreg(&cru->clksel_con[111], DCLK1_VOP_SRC_SEL_MASK,  in rk3588_dclk_vop_set_parent()
1950 		rk_clrsetreg(&cru->clksel_con[112], DCLK2_VOP_SRC_SEL_MASK,  in rk3588_dclk_vop_set_parent()
1954 		rk_clrsetreg(&cru->clksel_con[113], DCLK3_VOP_SRC_SEL_MASK,  in rk3588_dclk_vop_set_parent()
1964 		rk_clrsetreg(&cru->clksel_con[112], DCLK0_VOP_SEL_MASK,  in rk3588_dclk_vop_set_parent()
1974 		rk_clrsetreg(&cru->clksel_con[112], DCLK1_VOP_SEL_MASK,  in rk3588_dclk_vop_set_parent()
1984 		rk_clrsetreg(&cru->clksel_con[112], DCLK2_VOP_SEL_MASK,  in rk3588_dclk_vop_set_parent()
2027 	rk_clrsetreg(&priv->cru->clksel_con[38],  in rk3588_clk_init()
2053 	rk_clrsetreg(&priv->cru->clksel_con[9],  in rk3588_clk_init()