Lines Matching refs:rk_clrsetreg
231 rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK, in rk3568_rtc32k_set_pmuclk()
273 rk_clrsetreg(&pmucru->pmu_clksel_con[3], CLK_I2C0_DIV_MASK, in rk3568_i2c_set_pmuclk()
315 rk_clrsetreg(&pmucru->pmu_clksel_con[6], in rk3568_pwm_set_pmuclk()
323 rk_clrsetreg(&pmucru->pmu_clksel_con[6], in rk3568_pwm_set_pmuclk()
361 rk_clrsetreg(&pmucru->pmu_clksel_con[2], in rk3568_pmu_set_pmuclk()
459 rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK, in rk3568_rtc32k_set_parent()
462 rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK, in rk3568_rtc32k_set_parent()
498 rk_clrsetreg(&priv->pmucru->pmu_clkgate_con[2], 0x3 << 13, 0 << 13); in rk3568_pmuclk_probe()
561 rk_clrsetreg(&cru->clksel_con[0], in rk3568_armclk_set_clk()
564 rk_clrsetreg(&cru->clksel_con[2], in rk3568_armclk_set_clk()
583 rk_clrsetreg(&cru->clksel_con[3], in rk3568_armclk_set_clk()
587 rk_clrsetreg(&cru->clksel_con[4], in rk3568_armclk_set_clk()
592 rk_clrsetreg(&cru->clksel_con[5], in rk3568_armclk_set_clk()
596 rk_clrsetreg(&cru->clksel_con[3], in rk3568_armclk_set_clk()
600 rk_clrsetreg(&cru->clksel_con[4], in rk3568_armclk_set_clk()
605 rk_clrsetreg(&cru->clksel_con[5], in rk3568_armclk_set_clk()
724 rk_clrsetreg(&cru->clksel_con[con], in rk3568_cpll_div_set_rate()
783 rk_clrsetreg(&cru->clksel_con[50], in rk3568_bus_set_clk()
797 rk_clrsetreg(&cru->clksel_con[50], in rk3568_bus_set_clk()
863 rk_clrsetreg(&cru->clksel_con[10], in rk3568_perimid_set_clk()
876 rk_clrsetreg(&cru->clksel_con[10], in rk3568_perimid_set_clk()
966 rk_clrsetreg(&cru->clksel_con[73], in rk3568_top_set_clk()
979 rk_clrsetreg(&cru->clksel_con[73], in rk3568_top_set_clk()
992 rk_clrsetreg(&cru->clksel_con[73], in rk3568_top_set_clk()
1005 rk_clrsetreg(&cru->clksel_con[73], in rk3568_top_set_clk()
1067 rk_clrsetreg(&cru->clksel_con[71], CLK_I2C_SEL_MASK, in rk3568_i2c_set_clk()
1128 rk_clrsetreg(&cru->clksel_con[72], in rk3568_spi_set_clk()
1133 rk_clrsetreg(&cru->clksel_con[72], in rk3568_spi_set_clk()
1138 rk_clrsetreg(&cru->clksel_con[72], in rk3568_spi_set_clk()
1143 rk_clrsetreg(&cru->clksel_con[72], in rk3568_spi_set_clk()
1200 rk_clrsetreg(&cru->clksel_con[72], in rk3568_pwm_set_clk()
1205 rk_clrsetreg(&cru->clksel_con[72], in rk3568_pwm_set_clk()
1210 rk_clrsetreg(&cru->clksel_con[72], in rk3568_pwm_set_clk()
1264 rk_clrsetreg(&cru->clksel_con[51], in rk3568_adc_set_clk()
1274 rk_clrsetreg(&cru->clksel_con[51], in rk3568_adc_set_clk()
1287 rk_clrsetreg(&cru->clksel_con[51], in rk3568_adc_set_clk()
1413 rk_clrsetreg(&cru->clksel_con[27], mask, src_clk << shift); in rk3568_crypto_set_rate()
1494 rk_clrsetreg(&cru->clksel_con[30], in rk3568_sdmmc_set_clk()
1499 rk_clrsetreg(&cru->clksel_con[30], in rk3568_sdmmc_set_clk()
1504 rk_clrsetreg(&cru->clksel_con[32], in rk3568_sdmmc_set_clk()
1568 rk_clrsetreg(&cru->clksel_con[28], in rk3568_sfc_set_clk()
1618 rk_clrsetreg(&cru->clksel_con[28], in rk3568_nand_set_clk()
1680 rk_clrsetreg(&cru->clksel_con[28], in rk3568_emmc_set_clk()
1725 rk_clrsetreg(&cru->clksel_con[28], in rk3568_emmc_set_bclk()
1766 rk_clrsetreg(&cru->clksel_con[38], in rk3568_aclk_vop_set_clk()
1839 rk_clrsetreg(&cru->clksel_con[conid], in rk3568_dclk_vop_set_clk()
1846 rk_clrsetreg(&cru->clksel_con[conid], in rk3568_dclk_vop_set_clk()
1880 rk_clrsetreg(&cru->clksel_con[conid], in rk3568_dclk_vop_set_clk()
1935 rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2], in rk3568_gmac_src_set_clk()
1988 rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2], in rk3568_gmac_out_set_clk()
2041 rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2], in rk3568_gmac_ptp_ref_set_clk()
2064 rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2], in rk3568_gmac_tx_rx_set_clk()
2072 rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2], in rk3568_gmac_tx_rx_set_clk()
2110 rk_clrsetreg(&cru->clksel_con[79], in rk3568_ebc_set_clk()
2113 rk_clrsetreg(&cru->clksel_con[43], in rk3568_ebc_set_clk()
2173 rk_clrsetreg(&cru->clksel_con[47], in rk3568_rkvdec_set_clk()
2192 rk_clrsetreg(&cru->clksel_con[49], in rk3568_rkvdec_set_clk()
2326 rk_clrsetreg(&cru->clksel_con[reg], in rk3568_uart_set_rate()
2443 rk_clrsetreg(&cru->clksel_con[21], in rk3568_i2s3_set_rate()
2449 rk_clrsetreg(&cru->clksel_con[21], in rk3568_i2s3_set_rate()
2457 rk_clrsetreg(&cru->clksel_con[83], in rk3568_i2s3_set_rate()
2463 rk_clrsetreg(&cru->clksel_con[21], in rk3568_i2s3_set_rate()
2488 rk_clrsetreg(&cru->clksel_con[reg], in rk3568_i2s3_set_rate()
3017 rk_clrsetreg(&cru->clksel_con[31], in rk3568_gmac0_src_set_parent()
3022 rk_clrsetreg(&cru->clksel_con[31], in rk3568_gmac0_src_set_parent()
3034 rk_clrsetreg(&cru->clksel_con[33], in rk3568_gmac1_src_set_parent()
3039 rk_clrsetreg(&cru->clksel_con[33], in rk3568_gmac1_src_set_parent()
3051 rk_clrsetreg(&cru->clksel_con[31], in rk3568_gmac0_tx_rx_set_parent()
3055 rk_clrsetreg(&cru->clksel_con[31], in rk3568_gmac0_tx_rx_set_parent()
3059 rk_clrsetreg(&cru->clksel_con[31], in rk3568_gmac0_tx_rx_set_parent()
3072 rk_clrsetreg(&cru->clksel_con[33], in rk3568_gmac1_tx_rx_set_parent()
3076 rk_clrsetreg(&cru->clksel_con[33], in rk3568_gmac1_tx_rx_set_parent()
3080 rk_clrsetreg(&cru->clksel_con[33], in rk3568_gmac1_tx_rx_set_parent()
3108 rk_clrsetreg(&cru->clksel_con[con_id], DCLK0_VOP_SEL_MASK, in rk3568_dclk_vop_set_parent()
3111 rk_clrsetreg(&cru->clksel_con[con_id], DCLK0_VOP_SEL_MASK, in rk3568_dclk_vop_set_parent()
3114 rk_clrsetreg(&cru->clksel_con[con_id], DCLK0_VOP_SEL_MASK, in rk3568_dclk_vop_set_parent()
3117 rk_clrsetreg(&cru->clksel_con[con_id], DCLK0_VOP_SEL_MASK, in rk3568_dclk_vop_set_parent()
3146 rk_clrsetreg(&cru->clksel_con[con_id], mask, in rk3568_rkvdec_set_parent()
3149 rk_clrsetreg(&cru->clksel_con[con_id], mask, in rk3568_rkvdec_set_parent()
3165 rk_clrsetreg(&grf->soc_con2, I2S3_MCLK_IOE_SEL_MASK, in rk3568_i2s3_set_parent()
3169 rk_clrsetreg(&grf->soc_con2, I2S3_MCLK_IOE_SEL_MASK, in rk3568_i2s3_set_parent()
3176 rk_clrsetreg(&grf->soc_con2, I2S3_MCLKOUT_SEL_MASK, in rk3568_i2s3_set_parent()
3180 rk_clrsetreg(&grf->soc_con2, I2S3_MCLKOUT_SEL_MASK, in rk3568_i2s3_set_parent()