Lines Matching refs:ppll_hz
259 return DIV_TO_RATE(priv->ppll_hz, div); in rk3568_i2c_get_pmuclk()
268 src_clk_div = DIV_ROUND_UP(priv->ppll_hz, rate); in rk3568_i2c_set_pmuclk()
297 parent = priv->ppll_hz; in rk3568_pwm_get_pmuclk()
321 src_clk_div = DIV_ROUND_UP(priv->ppll_hz, rate); in rk3568_pwm_set_pmuclk()
347 parent = priv->ppll_hz; in rk3568_pmu_get_pmuclk()
358 src_clk_div = DIV_ROUND_UP(priv->ppll_hz, rate); in rk3568_pmu_set_pmuclk()
374 if (!priv->ppll_hz) { in rk3568_pmuclk_get_rate()
375 printf("%s ppll=%lu\n", __func__, priv->ppll_hz); in rk3568_pmuclk_get_rate()
414 if (!priv->ppll_hz) { in rk3568_pmuclk_set_rate()
415 printf("%s ppll=%lu\n", __func__, priv->ppll_hz); in rk3568_pmuclk_set_rate()
424 priv->ppll_hz = rockchip_pll_get_rate(&rk3568_pll_clks[PPLL], in rk3568_pmuclk_set_rate()
489 if (priv->ppll_hz != PPLL_HZ) { in rk3568_pmuclk_probe()
494 priv->ppll_hz = PPLL_HZ; in rk3568_pmuclk_probe()
3267 priv->ppll_hz = rk3568_pmu_pll_get_rate(priv, PPLL); in rk3568_clk_init()