203 	u32 sel, con, div;  in rk3562_bus_get_rate()  local
209 		sel = (con & ACLK_BUS_SEL_MASK) >> ACLK_BUS_SEL_SHIFT;  in rk3562_bus_get_rate()
214 		sel = (con & HCLK_BUS_SEL_MASK) >> HCLK_BUS_SEL_SHIFT;  in rk3562_bus_get_rate()
219 		sel = (con & PCLK_BUS_SEL_MASK) >> PCLK_BUS_SEL_SHIFT;  in rk3562_bus_get_rate()
226 	if (sel == ACLK_BUS_SEL_CPLL)  in rk3562_bus_get_rate()
238 	u32 sel, div;  in rk3562_bus_set_rate()  local
241 		sel = ACLK_BUS_SEL_CPLL;  in rk3562_bus_set_rate()
244 		sel= ACLK_BUS_SEL_GPLL;  in rk3562_bus_set_rate()
252 			     (sel << ACLK_BUS_SEL_SHIFT) |  in rk3562_bus_set_rate()
258 			     (sel << HCLK_BUS_SEL_SHIFT) |  in rk3562_bus_set_rate()
264 			     (sel << PCLK_BUS_SEL_SHIFT) |  in rk3562_bus_set_rate()
277 	u32 sel, con, div;  in rk3562_peri_get_rate()  local
283 		sel = (con & ACLK_PERI_SEL_MASK) >> ACLK_PERI_SEL_SHIFT;  in rk3562_peri_get_rate()
288 		sel = (con & HCLK_PERI_SEL_MASK) >> HCLK_PERI_SEL_SHIFT;  in rk3562_peri_get_rate()
293 		sel = (con & PCLK_PERI_SEL_MASK) >> PCLK_PERI_SEL_SHIFT;  in rk3562_peri_get_rate()
300 	if (sel == ACLK_PERI_SEL_CPLL)  in rk3562_peri_get_rate()
312 	u32 sel, div;  in rk3562_peri_set_rate()  local
315 		sel = ACLK_PERI_SEL_CPLL;  in rk3562_peri_set_rate()
318 		sel= ACLK_PERI_SEL_GPLL;  in rk3562_peri_set_rate()
326 			     (sel << ACLK_PERI_SEL_SHIFT) |  in rk3562_peri_set_rate()
332 			     (sel << HCLK_PERI_SEL_SHIFT) |  in rk3562_peri_set_rate()
338 			     (sel << PCLK_PERI_SEL_SHIFT) |  in rk3562_peri_set_rate()
351 	u32 sel, con, div;  in rk3562_i2c_get_rate()  local
357 		sel = (con & CLK_PMU0_I2C0_SEL_MASK) >> CLK_PMU0_I2C0_SEL_SHIFT;  in rk3562_i2c_get_rate()
358 		if (sel == CLK_PMU0_I2C0_SEL_200M)  in rk3562_i2c_get_rate()
360 		else if (sel == CLK_PMU0_I2C0_SEL_24M)  in rk3562_i2c_get_rate()
374 		sel = (con & CLK_I2C_SEL_MASK) >> CLK_I2C_SEL_SHIFT;  in rk3562_i2c_get_rate()
375 		if (sel == CLK_I2C_SEL_200M)  in rk3562_i2c_get_rate()
377 		else if (sel == CLK_I2C_SEL_100M)  in rk3562_i2c_get_rate()
379 		else if (sel == CLK_I2C_SEL_50M)  in rk3562_i2c_get_rate()
395 	u32 sel, div;  in rk3562_i2c_set_rate()  local
400 			sel = CLK_PMU0_I2C0_SEL_200M;  in rk3562_i2c_set_rate()
403 			sel = CLK_PMU0_I2C0_SEL_24M;  in rk3562_i2c_set_rate()
406 			sel = CLK_PMU0_I2C0_SEL_32K;  in rk3562_i2c_set_rate()
409 			sel = CLK_PMU0_I2C0_SEL_200M;  in rk3562_i2c_set_rate()
416 			     sel << CLK_PMU0_I2C0_SEL_SHIFT);  in rk3562_i2c_set_rate()
424 			sel = CLK_I2C_SEL_200M;  in rk3562_i2c_set_rate()
426 			sel = CLK_I2C_SEL_100M;  in rk3562_i2c_set_rate()
428 			sel = CLK_I2C_SEL_50M;  in rk3562_i2c_set_rate()
430 			sel = CLK_I2C_SEL_24M;  in rk3562_i2c_set_rate()
432 			     sel << CLK_I2C_SEL_SHIFT);  in rk3562_i2c_set_rate()
624 	u32 sel, con, div, mask, shift;  in rk3562_pwm_get_rate()  local
630 		sel = (con & CLK_PMU1_PWM0_SEL_MASK) >> CLK_PMU1_PWM0_SEL_SHIFT;  in rk3562_pwm_get_rate()
631 		if (sel == CLK_PMU1_PWM0_SEL_200M)  in rk3562_pwm_get_rate()
633 		else if (sel == CLK_PMU1_PWM0_SEL_24M)  in rk3562_pwm_get_rate()
657 	sel = (con & mask) >> shift;  in rk3562_pwm_get_rate()
658 	if (sel == CLK_PWM_SEL_100M)  in rk3562_pwm_get_rate()
660 	else if (sel == CLK_PWM_SEL_50M)  in rk3562_pwm_get_rate()
672 	u32 sel, div, mask, shift;  in rk3562_pwm_set_rate()  local
677 			sel = CLK_PMU1_PWM0_SEL_200M;  in rk3562_pwm_set_rate()
680 			sel = CLK_PMU1_PWM0_SEL_24M;  in rk3562_pwm_set_rate()
683 			sel = CLK_PMU1_PWM0_SEL_32K;  in rk3562_pwm_set_rate()
686 			sel = CLK_PMU1_PWM0_SEL_200M;  in rk3562_pwm_set_rate()
693 			     sel << CLK_PMU1_PWM0_SEL_SHIFT);  in rk3562_pwm_set_rate()
713 		sel = CLK_PWM_SEL_100M;  in rk3562_pwm_set_rate()
715 		sel = CLK_PWM_SEL_50M;  in rk3562_pwm_set_rate()
717 		sel = CLK_PWM_SEL_24M;  in rk3562_pwm_set_rate()
718 	rk_clrsetreg(&cru->periclksel_con[40], mask, sel << shift);  in rk3562_pwm_set_rate()
726 	u32 sel, con, div, mask, shift;  in rk3562_spi_get_rate()  local
732 		sel = (con & CLK_PMU1_SPI0_SEL_MASK) >> CLK_PMU1_SPI0_SEL_SHIFT;  in rk3562_spi_get_rate()
733 		if (sel == CLK_PMU1_SPI0_SEL_200M)  in rk3562_spi_get_rate()
735 		else if (sel == CLK_PMU1_SPI0_SEL_24M)  in rk3562_spi_get_rate()
755 	sel = (con & mask) >> shift;  in rk3562_spi_get_rate()
756 	if (sel == CLK_SPI_SEL_200M)  in rk3562_spi_get_rate()
758 	else if (sel == CLK_SPI_SEL_100M)  in rk3562_spi_get_rate()
760 	else if (sel == CLK_SPI_SEL_50M)  in rk3562_spi_get_rate()
772 	u32 sel, div, mask, shift;  in rk3562_spi_set_rate()  local
777 			sel = CLK_PMU1_SPI0_SEL_200M;  in rk3562_spi_set_rate()
780 			sel = CLK_PMU1_SPI0_SEL_24M;  in rk3562_spi_set_rate()
783 			sel = CLK_PMU1_SPI0_SEL_32K;  in rk3562_spi_set_rate()
786 			sel = CLK_PMU1_SPI0_SEL_200M;  in rk3562_spi_set_rate()
793 			     sel << CLK_PMU1_SPI0_SEL_SHIFT);  in rk3562_spi_set_rate()
809 		sel = CLK_SPI_SEL_200M;  in rk3562_spi_set_rate()
811 		sel = CLK_SPI_SEL_100M;  in rk3562_spi_set_rate()
813 		sel = CLK_SPI_SEL_50M;  in rk3562_spi_set_rate()
815 		sel = CLK_SPI_SEL_24M;  in rk3562_spi_set_rate()
816 	rk_clrsetreg(&cru->periclksel_con[20], mask, sel << shift);  in rk3562_spi_set_rate()
916 	u32 div, sel, con, parent;  in rk3562_sfc_get_rate()  local
920 	sel = (con & SCLK_SFC_SEL_MASK) >> SCLK_SFC_SEL_SHIFT;  in rk3562_sfc_get_rate()
921 	if (sel == SCLK_SFC_SRC_SEL_GPLL)  in rk3562_sfc_get_rate()
923 	else if (sel == SCLK_SFC_SRC_SEL_CPLL)  in rk3562_sfc_get_rate()
934 	int div, sel;  in rk3562_sfc_set_rate()  local
938 		sel = SCLK_SFC_SRC_SEL_24M;  in rk3562_sfc_set_rate()
941 		sel = SCLK_SFC_SRC_SEL_CPLL;  in rk3562_sfc_set_rate()
944 		sel = SCLK_SFC_SRC_SEL_GPLL;  in rk3562_sfc_set_rate()
950 		     sel << SCLK_SFC_SEL_SHIFT |  in rk3562_sfc_set_rate()
959 	u32 div, sel, con, parent;  in rk3562_emmc_get_rate()  local
965 		sel = (con & CCLK_EMMC_SEL_MASK) >> CCLK_EMMC_SEL_SHIFT;  in rk3562_emmc_get_rate()
966 		if (sel == CCLK_EMMC_SEL_GPLL)  in rk3562_emmc_get_rate()
968 		else if (sel == CCLK_EMMC_SEL_CPLL)  in rk3562_emmc_get_rate()
970 		else if (sel == CCLK_EMMC_SEL_HPLL)  in rk3562_emmc_get_rate()
978 		sel = (con & BCLK_EMMC_SEL_MASK) >> BCLK_EMMC_SEL_SHIFT;  in rk3562_emmc_get_rate()
979 		if (sel == BCLK_EMMC_SEL_GPLL)  in rk3562_emmc_get_rate()
995 	int div, sel;  in rk3562_emmc_set_rate()  local
1001 			sel = CCLK_EMMC_SEL_24M;  in rk3562_emmc_set_rate()
1004 			sel = CCLK_EMMC_SEL_CPLL;  in rk3562_emmc_set_rate()
1007 			sel = CCLK_EMMC_SEL_HPLL;  in rk3562_emmc_set_rate()
1010 			sel = CCLK_EMMC_SEL_GPLL;  in rk3562_emmc_set_rate()
1014 			     sel << CCLK_EMMC_SEL_SHIFT |  in rk3562_emmc_set_rate()
1020 			sel = BCLK_EMMC_SEL_CPLL;  in rk3562_emmc_set_rate()
1023 			sel = BCLK_EMMC_SEL_GPLL;  in rk3562_emmc_set_rate()
1027 			     sel << BCLK_EMMC_SEL_SHIFT |  in rk3562_emmc_set_rate()
1040 	u32 div, sel, con;  in rk3562_sdmmc_get_rate()  local
1049 		sel = (con & CCLK_SDMMC0_SEL_MASK) >> CCLK_SDMMC0_SEL_SHIFT;  in rk3562_sdmmc_get_rate()
1056 		sel = (con & CCLK_SDMMC1_SEL_MASK) >> CCLK_SDMMC1_SEL_SHIFT;  in rk3562_sdmmc_get_rate()
1062 	if (sel == CCLK_SDMMC_SEL_GPLL)  in rk3562_sdmmc_get_rate()
1064 	else if (sel == CCLK_SDMMC_SEL_CPLL)  in rk3562_sdmmc_get_rate()
1066 	else if (sel == CCLK_SDMMC_SEL_HPLL)  in rk3562_sdmmc_get_rate()
1078 	u32 div, sel;  in rk3562_sdmmc_set_rate()  local
1082 		sel = CCLK_SDMMC_SEL_24M;  in rk3562_sdmmc_set_rate()
1085 		sel = CCLK_SDMMC_SEL_CPLL;  in rk3562_sdmmc_set_rate()
1088 		sel = CCLK_SDMMC_SEL_HPLL;  in rk3562_sdmmc_set_rate()
1091 		sel = CCLK_SDMMC_SEL_CPLL;  in rk3562_sdmmc_set_rate()
1099 			     sel << CCLK_SDMMC0_SEL_SHIFT |  in rk3562_sdmmc_set_rate()
1106 			     sel << CCLK_SDMMC1_SEL_SHIFT |  in rk3562_sdmmc_set_rate()
1119 	u32 con, sel, div;  in rk3562_vop_get_rate()  local
1126 		sel = (con & ACLK_VOP_SEL_MASK) >> ACLK_VOP_SEL_SHIFT;  in rk3562_vop_get_rate()
1127 		if (sel == ACLK_VOP_SEL_GPLL)  in rk3562_vop_get_rate()
1129 		else if (sel == ACLK_VOP_SEL_CPLL)  in rk3562_vop_get_rate()
1131 		else if (sel == ACLK_VOP_SEL_HPLL)  in rk3562_vop_get_rate()
1133 		else if (sel == ACLK_VOP_SEL_VPLL)  in rk3562_vop_get_rate()
1142 		sel = (con & DCLK_VOP_SEL_MASK) >> DCLK_VOP_SEL_SHIFT;  in rk3562_vop_get_rate()
1143 		if (sel == DCLK_VOP_SEL_VPLL)  in rk3562_vop_get_rate()
1151 		sel = (con & DCLK_VOP1_SEL_MASK) >> DCLK_VOP1_SEL_SHIFT;  in rk3562_vop_get_rate()
1157 	if (sel == DCLK_VOP_SEL_GPLL)  in rk3562_vop_get_rate()
1159 	else if (sel == DCLK_VOP_SEL_HPLL)  in rk3562_vop_get_rate()
1161 	else if (sel == DCLK_VOP_SEL_VPLL)  in rk3562_vop_get_rate()
1175 	u32 i, div, sel, best_div = 0, best_sel = 0;  in rk3562_vop_set_rate()  local
1182 			sel = ACLK_VOP_SEL_CPLL;  in rk3562_vop_set_rate()
1185 			sel = ACLK_VOP_SEL_HPLL;  in rk3562_vop_set_rate()
1188 			sel = ACLK_VOP_SEL_VPLL;  in rk3562_vop_set_rate()
1191 			sel = ACLK_VOP_SEL_GPLL;  in rk3562_vop_set_rate()
1195 			     sel << ACLK_VOP_SEL_SHIFT |  in rk3562_vop_set_rate()
1257 	u32 con, sel, div;  in rk3562_gmac_get_rate()  local
1263 		sel = (con & CLK_GMAC_125M_SEL_MASK) >> CLK_GMAC_125M_SEL_SHIFT;  in rk3562_gmac_get_rate()
1264 		if (sel == CLK_GMAC_125M)  in rk3562_gmac_get_rate()
1270 		sel = (con & CLK_GMAC_50M_SEL_MASK) >> CLK_GMAC_50M_SEL_SHIFT;  in rk3562_gmac_get_rate()
1271 		if (sel == CLK_GMAC_50M)  in rk3562_gmac_get_rate()
1277 		sel = (con & CLK_GMAC_50M_SEL_MASK) >> CLK_GMAC_50M_SEL_SHIFT;  in rk3562_gmac_get_rate()
1278 		if (sel == CLK_GMAC_50M)  in rk3562_gmac_get_rate()
1284 		sel = (con & CLK_GMAC_ETH_OUT2IO_SEL_MASK) >> CLK_GMAC_ETH_OUT2IO_SEL_SHIFT;  in rk3562_gmac_get_rate()
1286 		if (sel == CLK_GMAC_ETH_OUT2IO_GPLL)  in rk3562_gmac_get_rate()
1302 	u32 sel, div;  in rk3562_gmac_set_rate()  local
1307 			sel = CLK_GMAC_125M;  in rk3562_gmac_set_rate()
1309 			sel = CLK_GMAC_24M;  in rk3562_gmac_set_rate()
1311 			     sel << CLK_GMAC_125M_SEL_SHIFT);  in rk3562_gmac_set_rate()
1315 			sel = CLK_GMAC_50M;  in rk3562_gmac_set_rate()
1317 			sel = CLK_GMAC_24M;  in rk3562_gmac_set_rate()
1319 			     sel << CLK_GMAC_50M_SEL_SHIFT);  in rk3562_gmac_set_rate()
1323 			sel = CLK_GMAC_50M;  in rk3562_gmac_set_rate()
1325 			sel = CLK_GMAC_24M;  in rk3562_gmac_set_rate()
1327 			     sel << CLK_GMAC_50M_SEL_SHIFT);  in rk3562_gmac_set_rate()
1332 			sel = CLK_GMAC_ETH_OUT2IO_CPLL;  in rk3562_gmac_set_rate()
1335 			sel = CLK_GMAC_ETH_OUT2IO_GPLL;  in rk3562_gmac_set_rate()
1339 			     sel << CLK_GMAC_ETH_OUT2IO_SEL_SHIFT |  in rk3562_gmac_set_rate()
1926 	u32 sel, con;  in rk3562_crypto_get_rate()  local
1932 		sel = (con & CLK_CORE_CRYPTO_SEL_MASK) >>  in rk3562_crypto_get_rate()
1934 		if (sel == CLK_CORE_CRYPTO_SEL_200M)  in rk3562_crypto_get_rate()
1936 		else if (sel == CLK_CORE_CRYPTO_SEL_100M)  in rk3562_crypto_get_rate()
1942 		sel = (con & CLK_PKA_CRYPTO_SEL_MASK) >>  in rk3562_crypto_get_rate()
1944 		if (sel == CLK_PKA_CRYPTO_SEL_300M)  in rk3562_crypto_get_rate()
1946 		else if (sel == CLK_PKA_CRYPTO_SEL_200M)  in rk3562_crypto_get_rate()
1948 		else if (sel == CLK_PKA_CRYPTO_SEL_100M)  in rk3562_crypto_get_rate()
1964 	u32 mask, shift, sel;  in rk3562_crypto_set_rate()  local
1971 			sel = CLK_CORE_CRYPTO_SEL_200M;  in rk3562_crypto_set_rate()
1973 			sel = CLK_CORE_CRYPTO_SEL_100M;  in rk3562_crypto_set_rate()
1975 			sel = CLK_CORE_CRYPTO_SEL_24M;  in rk3562_crypto_set_rate()
1981 			sel = CLK_PKA_CRYPTO_SEL_300M;  in rk3562_crypto_set_rate()
1983 			sel = CLK_PKA_CRYPTO_SEL_200M;  in rk3562_crypto_set_rate()
1985 			sel = CLK_PKA_CRYPTO_SEL_100M;  in rk3562_crypto_set_rate()
1987 			sel = CLK_PKA_CRYPTO_SEL_24M;  in rk3562_crypto_set_rate()
1992 	rk_clrsetreg(&cru->periclksel_con[43], mask, sel << shift);  in rk3562_crypto_set_rate()