Lines Matching full:rate
61 .rate = _rate##U, \
155 const struct rockchip_cpu_rate_table *rate; in rk3562_armclk_set_rate() local
159 rate = rockchip_get_cpu_settings(rk3562_cpu_rates, new_rate); in rk3562_armclk_set_rate()
160 if (!rate) { in rk3562_armclk_set_rate()
161 printf("%s unsupported rate\n", __func__); in rk3562_armclk_set_rate()
172 rate->aclk_div << ACLK_CORE_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
174 rate->pclk_div << PCLK_DBG_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
181 rate->aclk_div << ACLK_CORE_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
183 rate->pclk_div << PCLK_DBG_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
187 rate->aclk_div << ACLK_CORE_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
189 rate->pclk_div << PCLK_DBG_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
204 ulong rate; in rk3562_bus_get_rate() local
227 rate = priv->cpll_hz; in rk3562_bus_get_rate()
229 rate = priv->gpll_hz; in rk3562_bus_get_rate()
231 return DIV_TO_RATE(rate, div); in rk3562_bus_get_rate()
235 ulong rate) in rk3562_bus_set_rate() argument
240 if (priv->cpll_hz % rate == 0) { in rk3562_bus_set_rate()
242 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_bus_set_rate()
245 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_bus_set_rate()
278 ulong rate; in rk3562_peri_get_rate() local
301 rate = priv->cpll_hz; in rk3562_peri_get_rate()
303 rate = priv->gpll_hz; in rk3562_peri_get_rate()
305 return DIV_TO_RATE(rate, div); in rk3562_peri_get_rate()
309 ulong rate) in rk3562_peri_set_rate() argument
314 if (priv->cpll_hz % rate == 0) { in rk3562_peri_set_rate()
316 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_peri_set_rate()
319 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_peri_set_rate()
352 ulong rate; in rk3562_i2c_get_rate() local
359 rate = 200 * MHz; in rk3562_i2c_get_rate()
361 rate = OSC_HZ; in rk3562_i2c_get_rate()
363 rate = 32768; in rk3562_i2c_get_rate()
366 return DIV_TO_RATE(rate, div); in rk3562_i2c_get_rate()
376 rate = 200 * MHz; in rk3562_i2c_get_rate()
378 rate = 100 * MHz; in rk3562_i2c_get_rate()
380 rate = 50 * MHz; in rk3562_i2c_get_rate()
382 rate = OSC_HZ; in rk3562_i2c_get_rate()
388 return rate; in rk3562_i2c_get_rate()
392 ulong rate) in rk3562_i2c_set_rate() argument
399 if (rate == 200 * MHz) { in rk3562_i2c_set_rate()
402 } else if (rate == OSC_HZ) { in rk3562_i2c_set_rate()
405 } else if (rate == 32768) { in rk3562_i2c_set_rate()
410 div = DIV_ROUND_UP(200 * MHz, rate); in rk3562_i2c_set_rate()
423 if (rate == 200 * MHz) in rk3562_i2c_set_rate()
425 else if (rate == 100 * MHz) in rk3562_i2c_set_rate()
427 else if (rate == 50 * MHz) in rk3562_i2c_set_rate()
520 ulong rate) in rk3562_uart_set_rate() argument
528 if (priv->cpll_hz % rate == 0) { in rk3562_uart_set_rate()
530 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_uart_set_rate()
531 } else if (rate == OSC_HZ) { in rk3562_uart_set_rate()
537 rational_best_approximation(rate, priv->cpll_hz / div, in rk3562_uart_set_rate()
585 if (priv->gpll_hz % rate == 0) { in rk3562_uart_set_rate()
588 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_uart_set_rate()
589 } else if (priv->cpll_hz % rate == 0) { in rk3562_uart_set_rate()
592 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_uart_set_rate()
593 } else if (rate == OSC_HZ) { in rk3562_uart_set_rate()
601 rational_best_approximation(rate, priv->gpll_hz / div, in rk3562_uart_set_rate()
625 ulong rate; in rk3562_pwm_get_rate() local
632 rate = 200 * MHz; in rk3562_pwm_get_rate()
634 rate = OSC_HZ; in rk3562_pwm_get_rate()
636 rate = 32768; in rk3562_pwm_get_rate()
639 return DIV_TO_RATE(rate, div); in rk3562_pwm_get_rate()
659 rate = 100 * MHz; in rk3562_pwm_get_rate()
661 rate = 50 * MHz; in rk3562_pwm_get_rate()
663 rate = OSC_HZ; in rk3562_pwm_get_rate()
665 return rate; in rk3562_pwm_get_rate()
669 ulong rate) in rk3562_pwm_set_rate() argument
676 if (rate == 200 * MHz) { in rk3562_pwm_set_rate()
679 } else if (rate == OSC_HZ) { in rk3562_pwm_set_rate()
682 } else if (rate == 32768) { in rk3562_pwm_set_rate()
687 div = DIV_ROUND_UP(200 * MHz, rate); in rk3562_pwm_set_rate()
712 if (rate == 100 * MHz) in rk3562_pwm_set_rate()
714 else if (rate == 50 * MHz) in rk3562_pwm_set_rate()
727 ulong rate; in rk3562_spi_get_rate() local
734 rate = 200 * MHz; in rk3562_spi_get_rate()
736 rate = OSC_HZ; in rk3562_spi_get_rate()
738 rate = 32768; in rk3562_spi_get_rate()
741 return DIV_TO_RATE(rate, div); in rk3562_spi_get_rate()
757 rate = 200 * MHz; in rk3562_spi_get_rate()
759 rate = 100 * MHz; in rk3562_spi_get_rate()
761 rate = 50 * MHz; in rk3562_spi_get_rate()
763 rate = OSC_HZ; in rk3562_spi_get_rate()
765 return rate; in rk3562_spi_get_rate()
769 ulong rate) in rk3562_spi_set_rate() argument
776 if (rate == 200 * MHz) { in rk3562_spi_set_rate()
779 } else if (rate == OSC_HZ) { in rk3562_spi_set_rate()
782 } else if (rate == 32768) { in rk3562_spi_set_rate()
787 div = DIV_ROUND_UP(200 * MHz, rate); in rk3562_spi_set_rate()
808 if (rate == 200 * MHz) in rk3562_spi_set_rate()
810 else if (rate == 100 * MHz) in rk3562_spi_set_rate()
812 else if (rate == 50 * MHz) in rk3562_spi_set_rate()
843 ulong rate) in rk3562_tsadc_set_rate() argument
861 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3562_tsadc_set_rate()
890 ulong rate) in rk3562_saradc_set_rate() argument
897 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3562_saradc_set_rate()
902 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3562_saradc_set_rate()
931 static ulong rk3562_sfc_set_rate(struct rk3562_clk_priv *priv, ulong rate) in rk3562_sfc_set_rate() argument
936 if (OSC_HZ % rate == 0) { in rk3562_sfc_set_rate()
937 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3562_sfc_set_rate()
939 } else if ((priv->cpll_hz % rate) == 0) { in rk3562_sfc_set_rate()
940 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_sfc_set_rate()
943 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_sfc_set_rate()
992 ulong rate) in rk3562_emmc_set_rate() argument
999 if (OSC_HZ % rate == 0) { in rk3562_emmc_set_rate()
1000 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3562_emmc_set_rate()
1002 } else if ((priv->cpll_hz % rate) == 0) { in rk3562_emmc_set_rate()
1003 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_emmc_set_rate()
1005 } else if ((priv->hpll_hz % rate) == 0) { in rk3562_emmc_set_rate()
1006 div = DIV_ROUND_UP(priv->hpll_hz, rate); in rk3562_emmc_set_rate()
1009 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_emmc_set_rate()
1018 if ((priv->cpll_hz % rate) == 0) { in rk3562_emmc_set_rate()
1019 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_emmc_set_rate()
1022 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_emmc_set_rate()
1075 ulong clk_id, ulong rate) in rk3562_sdmmc_set_rate() argument
1080 if (OSC_HZ % rate == 0) { in rk3562_sdmmc_set_rate()
1081 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3562_sdmmc_set_rate()
1083 } else if ((priv->cpll_hz % rate) == 0) { in rk3562_sdmmc_set_rate()
1084 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_sdmmc_set_rate()
1086 } else if ((priv->hpll_hz % rate) == 0) { in rk3562_sdmmc_set_rate()
1087 div = DIV_ROUND_UP(priv->hpll_hz, rate); in rk3562_sdmmc_set_rate()
1090 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_sdmmc_set_rate()
1172 ulong rate) in rk3562_vop_set_rate() argument
1180 if ((priv->cpll_hz % rate) == 0) { in rk3562_vop_set_rate()
1181 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_vop_set_rate()
1183 } else if ((priv->hpll_hz % rate) == 0) { in rk3562_vop_set_rate()
1184 div = DIV_ROUND_UP(priv->hpll_hz, rate); in rk3562_vop_set_rate()
1186 } else if ((priv->vpll_hz % rate) == 0) { in rk3562_vop_set_rate()
1187 div = DIV_ROUND_UP(priv->vpll_hz, rate); in rk3562_vop_set_rate()
1190 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_vop_set_rate()
1200 div = DIV_ROUND_UP(RK3562_VOP_PLL_LIMIT_FREQ, rate); in rk3562_vop_set_rate()
1206 VPLL, div * rate); in rk3562_vop_set_rate()
1225 div = DIV_ROUND_UP(pll_rate, rate); in rk3562_vop_set_rate()
1229 if (abs(rate - now) < abs(rate - best_rate)) { in rk3562_vop_set_rate()
1243 printf("do not support this vop freq %lu\n", rate); in rk3562_vop_set_rate()
1299 ulong rate) in rk3562_gmac_set_rate() argument
1306 if (rate == 125000000) in rk3562_gmac_set_rate()
1314 if (rate == 50000000) in rk3562_gmac_set_rate()
1322 if (rate == 50000000) in rk3562_gmac_set_rate()
1330 if ((priv->cpll_hz % rate) == 0) { in rk3562_gmac_set_rate()
1331 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3562_gmac_set_rate()
1334 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3562_gmac_set_rate()
1352 ulong rate = 0; in rk3562_clk_get_rate() local
1363 rate = rockchip_pll_get_rate(&rk3562_pll_clks[APLL], priv->cru, in rk3562_clk_get_rate()
1367 rate = rockchip_pll_get_rate(&rk3562_pll_clks[GPLL], priv->cru, in rk3562_clk_get_rate()
1372 rate = rockchip_pll_get_rate(&rk3562_pll_clks[VPLL], priv->cru, in rk3562_clk_get_rate()
1376 rate = rockchip_pll_get_rate(&rk3562_pll_clks[HPLL], priv->cru, in rk3562_clk_get_rate()
1380 rate = rockchip_pll_get_rate(&rk3562_pll_clks[CPLL], priv->cru, in rk3562_clk_get_rate()
1384 rate = rockchip_pll_get_rate(&rk3562_pll_clks[DPLL], priv->cru, in rk3562_clk_get_rate()
1390 rate = rk3562_bus_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1395 rate = rk3562_peri_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1404 rate = rk3562_i2c_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1416 rate = rk3562_uart_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1422 rate = rk3562_pwm_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1427 rate = rk3562_spi_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1431 rate = rk3562_tsadc_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1435 rate = rk3562_saradc_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1438 rate = rk3562_sfc_get_rate(priv); in rk3562_clk_get_rate()
1442 rate = rk3562_emmc_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1450 rate = rk3562_sdmmc_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1455 rate = rk3562_vop_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1461 rate = rk3562_gmac_get_rate(priv, clk->id); in rk3562_clk_get_rate()
1464 rate = OSC_HZ; in rk3562_clk_get_rate()
1470 return rate; in rk3562_clk_get_rate()
1473 static ulong rk3562_clk_set_rate(struct clk *clk, ulong rate) in rk3562_clk_set_rate() argument
1484 debug("%s: id=%ld, rate=%ld\n", __func__, clk->id, rate); in rk3562_clk_set_rate()
1490 rk3562_armclk_set_rate(priv, rate); in rk3562_clk_set_rate()
1491 priv->armclk_hz = rate; in rk3562_clk_set_rate()
1495 GPLL, rate); in rk3562_clk_set_rate()
1501 VPLL, rate); in rk3562_clk_set_rate()
1507 HPLL, rate); in rk3562_clk_set_rate()
1514 ret = rk3562_bus_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1519 ret = rk3562_peri_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1528 ret = rk3562_i2c_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1540 ret = rk3562_uart_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1546 ret = rk3562_pwm_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1551 ret = rk3562_spi_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1555 ret = rk3562_tsadc_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1559 ret = rk3562_saradc_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1562 ret = rk3562_sfc_set_rate(priv, rate); in rk3562_clk_set_rate()
1566 ret = rk3562_emmc_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1572 ret = rk3562_sdmmc_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1577 ret = rk3562_vop_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1583 ret = rk3562_gmac_set_rate(priv, clk->id, rate); in rk3562_clk_set_rate()
1611 ulong rate; in rk3562_mmc_get_phase() local
1613 rate = rk3562_clk_get_rate(clk); in rk3562_mmc_get_phase()
1614 if (rate < 0) in rk3562_mmc_get_phase()
1615 return rate; in rk3562_mmc_get_phase()
1630 36 * (rate / 1000000); in rk3562_mmc_get_phase()
1646 ulong rate; in rk3562_mmc_set_phase() local
1648 rate = rk3562_clk_get_rate(clk); in rk3562_mmc_set_phase()
1649 if (rate < 0) in rk3562_mmc_set_phase()
1650 return rate; in rk3562_mmc_set_phase()
1661 delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 * in rk3562_mmc_set_phase()
1734 ulong rate; in soc_clk_dump() local
1760 rate = clk_get_rate(&clk); in soc_clk_dump()
1763 if (rate < 0) in soc_clk_dump()
1768 rate / 1000); in soc_clk_dump()
1770 if (rate < 0) in soc_clk_dump()
1775 rate / 1000); in soc_clk_dump()
1927 ulong rate; in rk3562_crypto_get_rate() local
1935 rate = 200 * MHz; in rk3562_crypto_get_rate()
1937 rate = 100 * MHz; in rk3562_crypto_get_rate()
1939 rate = OSC_HZ; in rk3562_crypto_get_rate()
1945 rate = 300 * MHz; in rk3562_crypto_get_rate()
1947 rate = 200 * MHz; in rk3562_crypto_get_rate()
1949 rate = 100 * MHz; in rk3562_crypto_get_rate()
1951 rate = OSC_HZ; in rk3562_crypto_get_rate()
1957 return rate; in rk3562_crypto_get_rate()
1961 ulong rate) in rk3562_crypto_set_rate() argument
1970 if (rate == 200 * MHz) in rk3562_crypto_set_rate()
1972 else if (rate == 100 * MHz) in rk3562_crypto_set_rate()
1980 if (rate == 300 * MHz) in rk3562_crypto_set_rate()
1982 else if (rate == 200 * MHz) in rk3562_crypto_set_rate()
1984 else if (rate == 100 * MHz) in rk3562_crypto_set_rate()
2010 static ulong rk3562_clk_scmi_set_rate(struct clk *clk, ulong rate) in rk3562_clk_scmi_set_rate() argument
2017 return rk3562_crypto_set_rate(priv, clk->id, rate); in rk3562_clk_scmi_set_rate()