328 	u32 sel_mask = 0, sel_shift;  in rk3528_cgpll_matrix_get_rate()  local
364 		sel_mask = CLK_MATRIX_250M_SRC_SEL_MASK;  in rk3528_cgpll_matrix_get_rate()
391 		sel_mask = CLK_MATRIX_500M_SRC_SEL_MASK;  in rk3528_cgpll_matrix_get_rate()
412 	if (sel_mask) {  in rk3528_cgpll_matrix_get_rate()
413 		sel = (readl(&cru->clksel_con[con]) & sel_mask) >> sel_shift;  in rk3528_cgpll_matrix_get_rate()
436 	u32 sel_mask = 0, sel_shift;  in rk3528_cgpll_matrix_set_rate()  local
472 		sel_mask = CLK_MATRIX_250M_SRC_SEL_MASK;  in rk3528_cgpll_matrix_set_rate()
499 		sel_mask = CLK_MATRIX_500M_SRC_SEL_MASK;  in rk3528_cgpll_matrix_set_rate()
520 	if (sel_mask) {  in rk3528_cgpll_matrix_set_rate()
542 	if (sel_mask)  in rk3528_cgpll_matrix_set_rate()
543 		rk_clrsetreg(&cru->clksel_con[con], sel_mask, sel << sel_shift);  in rk3528_cgpll_matrix_set_rate()
1052 	u32 sel_mask, sel_shift;  in rk3528_dclk_vop_get_clk()  local
1059 		sel_mask = DCLK_VOP_SRC0_SEL_MASK;  in rk3528_dclk_vop_get_clk()
1068 		sel_mask = DCLK_VOP_SRC1_SEL_MASK;  in rk3528_dclk_vop_get_clk()
1080 	sel = (con & sel_mask) >> sel_shift;  in rk3528_dclk_vop_get_clk()
1094 	u32 sel_mask, sel_shift;  in rk3528_dclk_vop_set_clk()  local
1101 		sel_mask = DCLK_VOP_SRC0_SEL_MASK;  in rk3528_dclk_vop_set_clk()
1110 		sel_mask = DCLK_VOP_SRC1_SEL_MASK;  in rk3528_dclk_vop_set_clk()
1122 		sel = (DCLK_VOP_SRC_SEL_CLK_GPLL_MUX << sel_shift) & sel_mask;  in rk3528_dclk_vop_set_clk()
1125 		sel = (DCLK_VOP_SRC_SEL_CLK_CPLL_MUX << sel_shift) & sel_mask;  in rk3528_dclk_vop_set_clk()
1137 	u32 sel_shift, sel_mask, div_shift, div_mask;  in rk3528_uart_get_rate()  local
1145 		sel_mask = SCLK_UART0_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1153 		sel_mask = SCLK_UART1_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1161 		sel_mask = SCLK_UART2_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1169 		sel_mask = SCLK_UART3_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1177 		sel_mask = SCLK_UART4_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1185 		sel_mask = SCLK_UART5_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1193 		sel_mask = SCLK_UART6_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1201 		sel_mask = SCLK_UART7_SRC_SEL_MASK;  in rk3528_uart_get_rate()
1214 	sel = (con & sel_mask) >> sel_shift;  in rk3528_uart_get_rate()
1234 	u32 sel_shift, sel_mask, div_shift, div_mask;  in rk3528_uart_set_rate()  local
1257 		sel_mask = SCLK_UART0_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1265 		sel_mask = SCLK_UART1_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1273 		sel_mask = SCLK_UART2_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1281 		sel_mask = SCLK_UART3_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1289 		sel_mask = SCLK_UART4_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1297 		sel_mask = SCLK_UART5_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1305 		sel_mask = SCLK_UART6_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1313 		sel_mask = SCLK_UART7_SRC_SEL_MASK;  in rk3528_uart_set_rate()
1323 	rk_clrsetreg(&cru->clksel_con[id], sel_mask, sel << sel_shift);  in rk3528_uart_set_rate()