1051 	u32 div_mask, div_shift;  in rk3528_dclk_vop_get_clk()  local
1063 		div_shift = DCLK_VOP_SRC0_DIV_SHIFT;  in rk3528_dclk_vop_get_clk()
1071 		div_shift = DCLK_VOP_SRC1_DIV_SHIFT;  in rk3528_dclk_vop_get_clk()
1079 	div = (con & div_mask) >> div_shift;  in rk3528_dclk_vop_get_clk()
1093 	u32 div_mask, div_shift;  in rk3528_dclk_vop_set_clk()  local
1105 		div_shift = DCLK_VOP_SRC0_DIV_SHIFT;  in rk3528_dclk_vop_set_clk()
1113 		div_shift = DCLK_VOP_SRC1_DIV_SHIFT;  in rk3528_dclk_vop_set_clk()
1128 	div = ((DIV_ROUND_UP(prate, rate) - 1) << div_shift) & div_mask;  in rk3528_dclk_vop_set_clk()
1137 	u32 sel_shift, sel_mask, div_shift, div_mask;  in rk3528_uart_get_rate()  local
1146 		div_shift = CLK_UART0_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1154 		div_shift = CLK_UART1_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1162 		div_shift = CLK_UART2_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1170 		div_shift = CLK_UART3_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1178 		div_shift = CLK_UART4_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1186 		div_shift = CLK_UART5_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1194 		div_shift = CLK_UART6_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1202 		div_shift = CLK_UART7_SRC_DIV_SHIFT;  in rk3528_uart_get_rate()
1211 	div = (con & div_mask) >> div_shift;  in rk3528_uart_get_rate()
1234 	u32 sel_shift, sel_mask, div_shift, div_mask;  in rk3528_uart_set_rate()  local
1258 		div_shift = CLK_UART0_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1266 		div_shift = CLK_UART1_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1274 		div_shift = CLK_UART2_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1282 		div_shift = CLK_UART3_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1290 		div_shift = CLK_UART4_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1298 		div_shift = CLK_UART5_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1306 		div_shift = CLK_UART6_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1314 		div_shift = CLK_UART7_SRC_DIV_SHIFT;  in rk3528_uart_set_rate()
1322 	rk_clrsetreg(&cru->clksel_con[id - 2], div_mask, (div - 1) << div_shift);  in rk3528_uart_set_rate()