827 				ulong clk_id, ulong set_rate)  in rk3399_mmc_set_clk()  argument
837 		src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);  in rk3399_mmc_set_clk()
841 			src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);  in rk3399_mmc_set_clk()
865 		src_clk_div = DIV_ROUND_UP(GPLL_HZ, set_rate);  in rk3399_mmc_set_clk()
868 			src_clk_div = DIV_ROUND_UP(OSC_HZ, set_rate);  in rk3399_mmc_set_clk()
913 				ulong set_rate)  in rk3399_ddr_set_clk()  argument
921 	switch (set_rate) {  in rk3399_ddr_set_clk()
951 		pr_err("Unsupported SDRAM frequency!,%ld\n", set_rate);  in rk3399_ddr_set_clk()
955 	return set_rate;  in rk3399_ddr_set_clk()
1391 	.set_rate = rk3399_clk_set_rate,
1709 	.set_rate = rk3399_pmuclk_set_rate,