Lines Matching refs:refdiv
36 u32 refdiv; member
49 .refdiv = _refdiv,\
344 u32 refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
358 refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT; in rkclk_pll_get_rate()
359 return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000; in rkclk_pll_get_rate()
369 u32 vco_khz = OSC_HZ / 1000 * div->fbdiv / div->refdiv; in rkclk_set_pll()
374 pll_con, div->fbdiv, div->refdiv, div->postdiv1, in rkclk_set_pll()
398 (div->refdiv << PLL_REFDIV_SHIFT)); in rkclk_set_pll()
447 u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0; in pll_para_config() local
480 for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) { in pll_para_config()
481 fref_khz = ref_khz / refdiv; in pll_para_config()
496 div->refdiv = refdiv; in pll_para_config()
924 {.refdiv = 1, .fbdiv = 12, .postdiv1 = 3, .postdiv2 = 2}; in rk3399_ddr_set_clk()
928 {.refdiv = 1, .fbdiv = 50, .postdiv1 = 6, .postdiv2 = 1}; in rk3399_ddr_set_clk()
932 {.refdiv = 2, .fbdiv = 100, .postdiv1 = 4, .postdiv2 = 1}; in rk3399_ddr_set_clk()
936 {.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1}; in rk3399_ddr_set_clk()
940 {.refdiv = 2, .fbdiv = 111, .postdiv1 = 2, .postdiv2 = 1}; in rk3399_ddr_set_clk()
944 {.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1}; in rk3399_ddr_set_clk()
948 {.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1}; in rk3399_ddr_set_clk()