Lines Matching refs:cpll_hz
267 pll_rate = priv->cpll_hz; in rk3328_gmac2io_set_clk()
395 p_rate = priv->cpll_hz; in rk3328_spi_get_clk()
502 parent = priv->cpll_hz; in rk3328_vop_get_clk()
508 parent = priv->cpll_hz; in rk3328_vop_get_clk()
530 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_vop_set_clk()
565 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_vop_set_clk()
593 parent = priv->cpll_hz; in rk3328_bus_get_clk()
624 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_bus_set_clk()
667 parent = priv->cpll_hz; in rk3328_peri_get_clk()
698 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz); in rk3328_peri_set_clk()
792 if (!priv->cpll_hz) { in rk3328_clk_get_rate()
793 priv->cpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[CPLL], in rk3328_clk_get_rate()
795 debug("%s cpll=%lu\n", __func__, priv->cpll_hz); in rk3328_clk_get_rate()
882 priv->cpll_hz = rate; in rk3328_clk_set_rate()
1288 priv->cpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[CPLL], in rkclk_init()
1306 priv->cpll_hz = CPLL_HZ; in rkclk_init()