114 	[NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3328_PLL_CON(40),
135 	old_rate = rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],  in rk3328_armclk_set_clk()
136 					 priv->cru, NPLL);  in rk3328_armclk_set_clk()
138 		if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL],  in rk3328_armclk_set_clk()
139 					  priv->cru, NPLL, hz))  in rk3328_armclk_set_clk()
158 		if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL],  in rk3328_armclk_set_clk()
159 					  priv->cru, NPLL, hz))  in rk3328_armclk_set_clk()
163 	return rockchip_pll_get_rate(&rk3328_pll_clks[NPLL], priv->cru, NPLL);  in rk3328_armclk_set_clk()
809 		rate = rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],  in rk3328_clk_get_rate()
810 					     priv->cru, NPLL);  in rk3328_clk_get_rate()
1282 	if (rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],  in rkclk_init()
1283 				  priv->cru, NPLL) != APLL_HZ)  in rkclk_init()
1329 		rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],  in rk3328_clk_probe()
1330 				      priv->cru, NPLL);  in rk3328_clk_probe()
1334 		rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],  in rk3328_clk_probe()
1335 				      priv->cru, NPLL);  in rk3328_clk_probe()