Lines Matching refs:pll_rate
265 ulong pll_rate; in rk3308_mac_set_clk() local
269 pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0], in rk3308_mac_set_clk()
272 pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1], in rk3308_mac_set_clk()
275 pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL], in rk3308_mac_set_clk()
282 div = DIV_ROUND_UP(pll_rate, hz) - 1; in rk3308_mac_set_clk()
287 return DIV_TO_RATE(pll_rate, div); in rk3308_mac_set_clk()
564 ulong pll_rate, now, best_rate = 0; in rk3308_vop_set_clk() local
570 pll_rate = priv->dpll_hz; in rk3308_vop_set_clk()
573 pll_rate = priv->vpll0_hz; in rk3308_vop_set_clk()
576 pll_rate = priv->vpll1_hz; in rk3308_vop_set_clk()
583 div = DIV_ROUND_UP(pll_rate, hz); in rk3308_vop_set_clk()
586 now = pll_rate / div; in rk3308_vop_set_clk()
593 pll_rate, best_rate, best_div, best_sel); in rk3308_vop_set_clk()