76 	[APLL] = PLL(pll_rk3328, PLL_APLL, RK3308_PLL_CON(0),
154 	old_rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],  in rk3308_armclk_set_clk()
155 					 priv->cru, APLL);  in rk3308_armclk_set_clk()
157 		if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL],  in rk3308_armclk_set_clk()
158 					  priv->cru, APLL, hz))  in rk3308_armclk_set_clk()
175 		if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL],  in rk3308_armclk_set_clk()
176 					  priv->cru, APLL, hz))  in rk3308_armclk_set_clk()
180 	return rockchip_pll_get_rate(&rk3308_pll_clks[APLL], priv->cru, APLL);  in rk3308_armclk_set_clk()
939 		rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],  in rk3308_clk_get_rate()
940 					     priv->cru, APLL);  in rk3308_clk_get_rate()
1269 	if (rockchip_pll_get_rate(&rk3308_pll_clks[APLL],  in rk3308_clk_init()
1270 				  priv->cru, APLL) != APLL_HZ) {  in rk3308_clk_init()
1298 		rockchip_pll_get_rate(&rk3308_pll_clks[APLL],  in rk3308_clk_probe()
1299 				      priv->cru, APLL);  in rk3308_clk_probe()
1303 		rockchip_pll_get_rate(&rk3308_pll_clks[APLL],  in rk3308_clk_probe()
1304 				      priv->cru, APLL);  in rk3308_clk_probe()