250 	rk_clrsetreg(&pll->con0, CLKR_MASK | PLL_OD_MASK,  in rkclk_set_pll()
252 	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);  in rkclk_set_pll()
256 		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, div->nb - 1);  in rkclk_set_pll()
258 		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);  in rkclk_set_pll()
332 	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,  in rkclk_configure_ddr()
342 	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,  in rkclk_configure_ddr()
463 			rk_clrsetreg(&cru->cru_clksel_con[21], MAC_DIV_CON_MASK,  in rockchip_mac_set_clk()
495 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,  in rockchip_vop_set_clk()
507 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,  in rockchip_vop_set_clk()
519 		rk_clrsetreg(&cru->cru_clksel_con[27],  in rockchip_vop_set_clk()
532 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,  in rockchip_vop_set_clk()
544 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,  in rockchip_vop_set_clk()
557 		rk_clrsetreg(&cru->cru_clksel_con[29],  in rockchip_vop_set_clk()
564 		rk_clrsetreg(&cru->cru_clksel_con[31],  in rockchip_vop_set_clk()
571 		rk_clrsetreg(&cru->cru_clksel_con[31],  in rockchip_vop_set_clk()
577 		rk_clrsetreg(&cru->cru_clksel_con[28],  in rockchip_vop_set_clk()
594 	rk_clrsetreg(&cru->cru_mode_con,  in rkclk_init()
623 	rk_clrsetreg(&cru->cru_clksel_con[1],  in rkclk_init()
646 	rk_clrsetreg(&cru->cru_clksel_con[10],  in rkclk_init()
654 	rk_clrsetreg(&cru->cru_clksel_con[39],  in rkclk_init()
658 	rk_clrsetreg(&cru->cru_clksel_con[42],  in rkclk_init()
667 	rk_clrsetreg(&cru->cru_mode_con,  in rkclk_init()
676 	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,  in rk3288_clk_configure_cpu()
691 	rk_clrsetreg(&cru->cru_clksel_con[0],  in rk3288_clk_configure_cpu()
702 	rk_clrsetreg(&cru->cru_clksel_con[37],  in rk3288_clk_configure_cpu()
710 	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,  in rk3288_clk_configure_cpu()
773 		rk_clrsetreg(&cru->cru_clksel_con[12],  in rockchip_mmc_set_clk()
780 		rk_clrsetreg(&cru->cru_clksel_con[11],  in rockchip_mmc_set_clk()
787 		rk_clrsetreg(&cru->cru_clksel_con[12],  in rockchip_mmc_set_clk()
839 		rk_clrsetreg(&cru->cru_clksel_con[25],  in rockchip_spi_set_clk()
845 		rk_clrsetreg(&cru->cru_clksel_con[25],  in rockchip_spi_set_clk()
851 		rk_clrsetreg(&cru->cru_clksel_con[39],  in rockchip_spi_set_clk()
964 	rk_clrsetreg(&cru->cru_clksel_con[24],  in rockchip_saradc_set_clk()
989 	rk_clrsetreg(&cru->cru_clksel_con[2],  in rockchip_tsadc_set_clk()
1017 	rk_clrsetreg(&cru->cru_clksel_con[26],  in rockchip_crypto_set_clk()
1070 	rk_clrsetreg(&cru->cru_misc_con,  in rockchip_test_set_clk()
1377 		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, 0);  in rk3288_gmac_set_parent()
1393 		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK,  in rk3288_gmac_set_parent()
1425 		rk_clrsetreg(&cru->cru_clksel_con[27],  in rk3288_vop_set_parent()
1429 		rk_clrsetreg(&cru->cru_clksel_con[29],  in rk3288_vop_set_parent()