714 static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,  in rockchip_mmc_get_clk()  argument
745 	src_rate = mux == EMMC_PLL_SELECT_24MHZ ? OSC_HZ : gclk_rate;  in rockchip_mmc_get_clk()
749 static ulong rockchip_mmc_set_clk(struct rk3288_cru *cru, uint gclk_rate,  in rockchip_mmc_set_clk()  argument
755 	debug("%s: gclk_rate=%u\n", __func__, gclk_rate);  in rockchip_mmc_set_clk()
757 	src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq);  in rockchip_mmc_set_clk()
796 	return rockchip_mmc_get_clk(cru, gclk_rate, periph);  in rockchip_mmc_set_clk()
799 static ulong rockchip_spi_get_clk(struct rk3288_cru *cru, uint gclk_rate,  in rockchip_spi_get_clk()  argument
826 	return DIV_TO_RATE(gclk_rate, div);  in rockchip_spi_get_clk()
829 static ulong rockchip_spi_set_clk(struct rk3288_cru *cru, uint gclk_rate,  in rockchip_spi_set_clk()  argument
834 	debug("%s: clk_general_rate=%u\n", __func__, gclk_rate);  in rockchip_spi_set_clk()
835 	src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1;  in rockchip_spi_set_clk()
860 	return rockchip_spi_get_clk(cru, gclk_rate, periph);  in rockchip_spi_set_clk()
1024 static ulong rk3288_alive_get_clk(struct rk3288_cru *cru, uint gclk_rate)  in rk3288_alive_get_clk()  argument
1031 	parent = gclk_rate;  in rk3288_alive_get_clk()
1081 	ulong new_rate, gclk_rate;  in rk3288_clk_get_rate()  local
1083 	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);  in rk3288_clk_get_rate()
1096 		new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id);  in rk3288_clk_get_rate()
1101 		new_rate = rockchip_spi_get_clk(priv->cru, gclk_rate, clk->id);  in rk3288_clk_get_rate()
1137 		new_rate = rk3288_alive_get_clk(priv->cru, gclk_rate);  in rk3288_clk_get_rate()
1155 	ulong new_rate, gclk_rate;  in rk3288_clk_set_rate()  local
1157 	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);  in rk3288_clk_set_rate()
1175 		new_rate = rockchip_mmc_set_clk(cru, gclk_rate, clk->id, rate);  in rk3288_clk_set_rate()
1180 		new_rate = rockchip_spi_set_clk(cru, gclk_rate, clk->id, rate);  in rk3288_clk_set_rate()