82 	[APLL] = PLL(pll_rk3036, PLL_APLL, RK2928_PLL_CON(0),
109 	old_rate = rockchip_pll_get_rate(&rk322x_pll_clks[APLL],  in rk322x_armclk_set_clk()
110 					 priv->cru, APLL);  in rk322x_armclk_set_clk()
112 		if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL],  in rk322x_armclk_set_clk()
113 					  priv->cru, APLL, hz))  in rk322x_armclk_set_clk()
132 		if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL],  in rk322x_armclk_set_clk()
133 					  priv->cru, APLL, hz))  in rk322x_armclk_set_clk()
137 	return rockchip_pll_get_rate(&rk322x_pll_clks[APLL], priv->cru, APLL);  in rk322x_armclk_set_clk()
590 		rate = rockchip_pll_get_rate(&rk322x_pll_clks[APLL],  in rk322x_clk_get_rate()
591 					     priv->cru, APLL);  in rk322x_clk_get_rate()
957 	if (rockchip_pll_get_rate(&rk322x_pll_clks[APLL],  in rkclk_init()
958 				  priv->cru, APLL) != APLL_HZ)  in rkclk_init()
1023 		rockchip_pll_get_rate(&rk322x_pll_clks[APLL],  in rk322x_clk_probe()
1024 				      priv->cru, APLL);  in rk322x_clk_probe()
1028 		rockchip_pll_get_rate(&rk322x_pll_clks[APLL],  in rk322x_clk_probe()
1029 				      priv->cru, APLL);  in rk322x_clk_probe()