123 	rk_clrsetreg(&pll->con0,  in rkclk_set_pll()
126 	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);  in rkclk_set_pll()
129 		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);  in rkclk_set_pll()
169 	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK << DPLL_MODE_SHIFT,  in rkclk_configure_ddr()
179 	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK << DPLL_MODE_SHIFT,  in rkclk_configure_ddr()
218 	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK << APLL_MODE_SHIFT,  in rkclk_configure_cpu()
228 	rk_clrsetreg(&cru->cru_clksel_con[0],  in rkclk_configure_cpu()
233 	rk_clrsetreg(&cru->cru_clksel_con[1],  in rkclk_configure_cpu()
238 	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK << APLL_MODE_SHIFT,  in rkclk_configure_cpu()
320 		rk_clrsetreg(&cru->cru_clksel_con[12],  in rockchip_mmc_set_clk()
326 		rk_clrsetreg(&cru->cru_clksel_con[11],  in rockchip_mmc_set_clk()
332 		rk_clrsetreg(&cru->cru_clksel_con[12],  in rockchip_mmc_set_clk()
374 		rk_clrsetreg(&cru->cru_clksel_con[25],  in rockchip_spi_set_clk()
380 		rk_clrsetreg(&cru->cru_clksel_con[25],  in rockchip_spi_set_clk()
408 	rk_clrsetreg(&cru->cru_clksel_con[24],  in rk3188_saradc_set_clk()
422 	rk_clrsetreg(&cru->cru_mode_con,  in rkclk_init()
446 	rk_clrsetreg(&cru->cru_clksel_con[0],  in rkclk_init()
459 	rk_clrsetreg(&cru->cru_clksel_con[1],  in rkclk_init()
482 	rk_clrsetreg(&cru->cru_clksel_con[10],  in rkclk_init()
492 	rk_clrsetreg(&cru->cru_mode_con,  in rkclk_init()