80 	[APLL] = PLL(pll_rk3036, PLL_APLL, RK1808_PLL_CON(0),
877 	old_rate = rockchip_pll_get_rate(&rk1808_pll_clks[APLL],  in rk1808_armclk_set_clk()
878 					 priv->cru, APLL);  in rk1808_armclk_set_clk()
880 		if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL],  in rk1808_armclk_set_clk()
881 					  priv->cru, APLL, hz))  in rk1808_armclk_set_clk()
898 		if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL],  in rk1808_armclk_set_clk()
899 					  priv->cru, APLL, hz))  in rk1808_armclk_set_clk()
903 	return rockchip_pll_get_rate(&rk1808_pll_clks[APLL], priv->cru, APLL);  in rk1808_armclk_set_clk()
923 		rate = rockchip_pll_get_rate(&rk1808_pll_clks[APLL],  in rk1808_clk_get_rate()
924 					     priv->cru, APLL);  in rk1808_clk_get_rate()
1286 		rockchip_pll_get_rate(&rk1808_pll_clks[APLL],  in rk1808_clk_probe()
1287 				      priv->cru, APLL);  in rk1808_clk_probe()
1290 	if (rockchip_pll_get_rate(&rk1808_pll_clks[APLL],  in rk1808_clk_probe()
1291 				  priv->cru, APLL) != APLL_HZ) {  in rk1808_clk_probe()