1772 	struct px30_clk_priv *cru_priv;  in px30_gpll_set_pmuclk()  local
1787 	cru_priv = dev_get_priv(cru_dev);  in px30_gpll_set_pmuclk()
1792 	cru_priv->gpll_hz = priv->gpll_hz;  in px30_gpll_set_pmuclk()
1796 	aclk_bus_rate = px30_bus_get_clk(cru_priv, ACLK_BUS_PRE);  in px30_gpll_set_pmuclk()
1797 	hclk_bus_rate = px30_bus_get_clk(cru_priv, HCLK_BUS_PRE);  in px30_gpll_set_pmuclk()
1798 	pclk_bus_rate = px30_bus_get_clk(cru_priv, PCLK_BUS_PRE);  in px30_gpll_set_pmuclk()
1799 	aclk_peri_rate = px30_peri_get_clk(cru_priv, ACLK_PERI_PRE);  in px30_gpll_set_pmuclk()
1800 	hclk_peri_rate = px30_peri_get_clk(cru_priv, HCLK_PERI_PRE);  in px30_gpll_set_pmuclk()
1806 	emmc_rate = px30_mmc_get_clk(cru_priv, SCLK_EMMC);  in px30_gpll_set_pmuclk()
1807 	sdmmc_rate = px30_mmc_get_clk(cru_priv, SCLK_SDMMC);  in px30_gpll_set_pmuclk()
1808 	nandc_rate = px30_nandc_get_clk(cru_priv);  in px30_gpll_set_pmuclk()
1809 	sfc_rate = px30_sfc_get_clk(cru_priv, SCLK_SFC);  in px30_gpll_set_pmuclk()
1814 	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate / div);  in px30_gpll_set_pmuclk()
1815 	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate / div);  in px30_gpll_set_pmuclk()
1816 	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, pclk_bus_rate / div);  in px30_gpll_set_pmuclk()
1817 	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, aclk_peri_rate / div);  in px30_gpll_set_pmuclk()
1818 	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, hclk_peri_rate / div);  in px30_gpll_set_pmuclk()
1821 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate / div);  in px30_gpll_set_pmuclk()
1822 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate / div);  in px30_gpll_set_pmuclk()
1823 	px30_nandc_set_clk(cru_priv, nandc_rate / div);  in px30_gpll_set_pmuclk()
1824 	px30_sfc_set_clk(cru_priv, SCLK_SFC, sfc_rate / div);  in px30_gpll_set_pmuclk()
1829 	cru_priv->gpll_hz = priv->gpll_hz;  in px30_gpll_set_pmuclk()
1832 	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate);  in px30_gpll_set_pmuclk()
1833 	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate);  in px30_gpll_set_pmuclk()
1834 	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, pclk_bus_rate);  in px30_gpll_set_pmuclk()
1835 	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, aclk_peri_rate);  in px30_gpll_set_pmuclk()
1836 	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, hclk_peri_rate);  in px30_gpll_set_pmuclk()
1839 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate);  in px30_gpll_set_pmuclk()
1840 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate);  in px30_gpll_set_pmuclk()
1841 	px30_nandc_set_clk(cru_priv, nandc_rate);  in px30_gpll_set_pmuclk()
1842 	px30_sfc_set_clk(cru_priv, SCLK_SFC, sfc_rate);  in px30_gpll_set_pmuclk()
1895 	struct px30_clk_priv *cru_priv;  in px30_clk_init()  local
1906 	cru_priv = dev_get_priv(cru_dev);  in px30_clk_init()
1909 	px30_i2s1_mclk_set_clk(cru_priv, SCLK_I2S1_OUT, 12000000);  in px30_clk_init()
1918 	cru_priv->gpll_hz = priv->gpll_hz;  in px30_clk_init()
1920 	npll_hz = px30_clk_get_pll_rate(cru_priv, NPLL);  in px30_clk_init()
1922 		ret = px30_clk_set_pll_rate(cru_priv, NPLL, NPLL_HZ);  in px30_clk_init()
1927 	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, ACLK_BUS_HZ);  in px30_clk_init()
1928 	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, HCLK_BUS_HZ);  in px30_clk_init()
1929 	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, PCLK_BUS_HZ);  in px30_clk_init()
1930 	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, ACLK_PERI_HZ);  in px30_clk_init()
1931 	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, HCLK_PERI_HZ);  in px30_clk_init()
1935 	px30_i2s1_mclk_set_clk(cru_priv, SCLK_I2S1_OUT, 11289600);  in px30_clk_init()