Lines Matching refs:ret

29 	int ret;  in clk_get_by_index_platdata()  local
33 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev); in clk_get_by_index_platdata()
34 if (ret) in clk_get_by_index_platdata()
35 return ret; in clk_get_by_index_platdata()
62 int ret; in clk_get_by_indexed_prop() local
72 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0, in clk_get_by_indexed_prop()
74 if (ret) { in clk_get_by_indexed_prop()
76 __func__, ret); in clk_get_by_indexed_prop()
77 return ret; in clk_get_by_indexed_prop()
80 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &dev_clk); in clk_get_by_indexed_prop()
81 if (ret) { in clk_get_by_indexed_prop()
83 __func__, ret); in clk_get_by_indexed_prop()
84 return ret; in clk_get_by_indexed_prop()
92 ret = ops->of_xlate(clk, &args); in clk_get_by_indexed_prop()
94 ret = clk_of_xlate_default(clk, &args); in clk_get_by_indexed_prop()
95 if (ret) { in clk_get_by_indexed_prop()
96 debug("of_xlate() failed: %d\n", ret); in clk_get_by_indexed_prop()
97 return ret; in clk_get_by_indexed_prop()
110 int i, ret, err, count; in clk_get_bulk() local
123 ret = clk_get_by_index(dev, i, &bulk->clks[i]); in clk_get_bulk()
124 if (ret < 0) in clk_get_bulk()
138 return ret; in clk_get_bulk()
146 int ret; in clk_set_default_parents() local
157 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents", in clk_set_default_parents()
159 if (ret) { in clk_set_default_parents()
162 return ret; in clk_set_default_parents()
165 ret = clk_get_by_indexed_prop(dev, "assigned-clocks", in clk_set_default_parents()
167 if (ret) { in clk_set_default_parents()
170 return ret; in clk_set_default_parents()
173 ret = clk_set_parent(&clk, &parent_clk); in clk_set_default_parents()
179 if (ret == -ENOSYS) in clk_set_default_parents()
182 if (ret) { in clk_set_default_parents()
185 return ret; in clk_set_default_parents()
198 int ret = 0; in clk_set_default_rates() local
210 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates); in clk_set_default_rates()
211 if (ret) in clk_set_default_rates()
215 ret = clk_get_by_indexed_prop(dev, "assigned-clocks", in clk_set_default_rates()
217 if (ret) { in clk_set_default_rates()
223 ret = clk_set_rate(&clk, rates[index]); in clk_set_default_rates()
224 if (ret < 0) { in clk_set_default_rates()
233 return ret; in clk_set_default_rates()
238 int ret; in clk_set_defaults() local
247 ret = clk_set_default_parents(dev); in clk_set_defaults()
248 if (ret) in clk_set_defaults()
249 return ret; in clk_set_defaults()
251 ret = clk_set_default_rates(dev); in clk_set_defaults()
252 if (ret < 0) in clk_set_defaults()
253 return ret; in clk_set_defaults()
277 int i, ret; in clk_release_all() local
286 ret = clk_disable(&clk[i]); in clk_release_all()
287 if (ret && ret != -ENOSYS) in clk_release_all()
288 return ret; in clk_release_all()
290 ret = clk_free(&clk[i]); in clk_release_all()
291 if (ret && ret != -ENOSYS) in clk_release_all()
292 return ret; in clk_release_all()
396 int i, ret; in clk_enable_bulk() local
399 ret = clk_enable(&bulk->clks[i]); in clk_enable_bulk()
400 if (ret < 0 && ret != -ENOSYS) in clk_enable_bulk()
401 return ret; in clk_enable_bulk()
421 int i, ret; in clk_disable_bulk() local
424 ret = clk_disable(&bulk->clks[i]); in clk_disable_bulk()
425 if (ret < 0 && ret != -ENOSYS) in clk_disable_bulk()
426 return ret; in clk_disable_bulk()
436 int ret; in clks_probe() local
438 ret = uclass_get(UCLASS_CLK, &uc); in clks_probe()
439 if (ret) in clks_probe()
440 return ret; in clks_probe()
443 ret = device_probe(dev); in clks_probe()
444 if (ret) in clks_probe()
445 printf("%s - probe failed: %d\n", dev->name, ret); in clks_probe()