288 	out_le32(priv->regbase + EDMA_CMD, EDMA_CMD_DISEDMA);  in mv_stop_edma_engine()
322 	out_le32(priv->regbase + EDMA_IECR, 0x0);  in mv_start_edma_engine()
326 	out_le32(SATAHC_BASE + SATAHC_ICR, tmp);  in mv_start_edma_engine()
332 	out_le32(priv->regbase + EDMA_CFG, tmp);  in mv_start_edma_engine()
334 	out_le32(priv->regbase + SIR_FIS_IRQ_CAUSE, 0x0);  in mv_start_edma_engine()
337 	out_le32(priv->regbase + SIR_FIS_CFG, 0x0);  in mv_start_edma_engine()
340 	out_le32(priv->regbase + EDMA_RQBA_HI, 0x0);  in mv_start_edma_engine()
341 	out_le32(priv->regbase + EDMA_RQIPR, priv->request);  in mv_start_edma_engine()
342 	out_le32(priv->regbase + EDMA_RQOPR, 0x0);  in mv_start_edma_engine()
345 	out_le32(priv->regbase + EDMA_RSBA_HI, 0x0);  in mv_start_edma_engine()
346 	out_le32(priv->regbase + EDMA_RSOPR, priv->response);  in mv_start_edma_engine()
347 	out_le32(priv->regbase + EDMA_RSIPR, 0x0);  in mv_start_edma_engine()
350 	out_le32(priv->regbase + EDMA_CMD, EDMA_CMD_ENEDMA);  in mv_start_edma_engine()
362 	out_le32(priv->regbase + EDMA_CMD, EDMA_CMD_ATARST);  in mv_reset_channel()
364 	out_le32(priv->regbase + EDMA_CMD, 0);  in mv_reset_channel()
376 	out_le32(priv->regbase + EDMA_CMD, 0x0);  in mv_reset_port()
377 	out_le32(priv->regbase + EDMA_CFG, 0x101f);  in mv_reset_port()
378 	out_le32(priv->regbase + EDMA_IECR, 0x0);  in mv_reset_port()
379 	out_le32(priv->regbase + EDMA_IEMR, 0x0);  in mv_reset_port()
380 	out_le32(priv->regbase + EDMA_RQBA_HI, 0x0);  in mv_reset_port()
381 	out_le32(priv->regbase + EDMA_RQIPR, 0x0);  in mv_reset_port()
382 	out_le32(priv->regbase + EDMA_RQOPR, 0x0);  in mv_reset_port()
383 	out_le32(priv->regbase + EDMA_RSBA_HI, 0x0);  in mv_reset_port()
384 	out_le32(priv->regbase + EDMA_RSIPR, 0x0);  in mv_reset_port()
385 	out_le32(priv->regbase + EDMA_RSOPR, 0x0);  in mv_reset_port()
386 	out_le32(priv->regbase + EDMA_IORTO, 0xfa);  in mv_reset_port()
391 	out_le32(SATAHC_BASE + SATAHC_ICT, 0x00);  in mv_reset_one_hc()
392 	out_le32(SATAHC_BASE + SATAHC_ITT, 0x00);  in mv_reset_one_hc()
393 	out_le32(SATAHC_BASE + SATAHC_ICR, 0x00);  in mv_reset_one_hc()
406 		out_le32(priv->regbase + SIR_SERROR, 0x0);  in probe_port()
411 		out_le32(priv->regbase + SIR_SCONTROL, tmp);  in probe_port()
419 			out_le32(priv->regbase + SIR_SCONTROL, tmp);  in probe_port()
444 			out_le32(priv->regbase + SIR_SCONTROL, 0x304);  in probe_port()
448 			out_le32(priv->regbase + SIR_ICFG, tmp);  in probe_port()
477 	out_le32(priv->regbase + EDMA_RQIPR, tmp);  in set_reqip()
526 	out_le32(priv->regbase + EDMA_RSOPR, tmp);  in set_rspop()
557 	out_le32(SATAHC_BASE + SATAHC_ICR, tmp);  in process_responses()
768 	out_le32(priv->regbase + PIO_SECTOR_COUNT, cfis->sector_count);  in mv_ata_exec_ata_cmd_nondma()
769 	out_le32(priv->regbase + PIO_LBA_HI, cfis->lba_high);  in mv_ata_exec_ata_cmd_nondma()
770 	out_le32(priv->regbase + PIO_LBA_MID, cfis->lba_mid);  in mv_ata_exec_ata_cmd_nondma()
771 	out_le32(priv->regbase + PIO_LBA_LOW, cfis->lba_low);  in mv_ata_exec_ata_cmd_nondma()
772 	out_le32(priv->regbase + PIO_ERR_FEATURES, cfis->features);  in mv_ata_exec_ata_cmd_nondma()
773 	out_le32(priv->regbase + PIO_DEVICE, cfis->device);  in mv_ata_exec_ata_cmd_nondma()
774 	out_le32(priv->regbase + PIO_CMD_STATUS, cfis->command);  in mv_ata_exec_ata_cmd_nondma()