Lines Matching +full:udma +full:- +full:p
2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * SPDX-License-Identifier: GPL-2.0+
100 return (i < timeout_msec) ? 0 : -1; in waiting_for_cmd_completed()
105 struct sata_host_regs *host_mmio = uc_priv->mmio_base; in ahci_setup_oobr()
107 writel(SATA_HOST_OOBR_WE, &host_mmio->oobr); in ahci_setup_oobr()
108 writel(0x02060b14, &host_mmio->oobr); in ahci_setup_oobr()
118 struct sata_host_regs *host_mmio = uc_priv->mmio_base; in ahci_host_init()
121 cap_save = readl(&host_mmio->cap); in ahci_host_init()
125 tmp = readl(&host_mmio->ghc); in ahci_host_init()
127 writel_with_flush(tmp | SATA_HOST_GHC_HR, &host_mmio->ghc); in ahci_host_init()
129 while ((readl(&host_mmio->ghc) & SATA_HOST_GHC_HR) && --timeout) in ahci_host_init()
134 return -1; in ahci_host_init()
138 writel(clk / 1000, &host_mmio->timer1ms); in ahci_host_init()
142 writel_with_flush(SATA_HOST_GHC_AE, &host_mmio->ghc); in ahci_host_init()
143 writel(cap_save, &host_mmio->cap); in ahci_host_init()
145 writel_with_flush((1 << num_ports) - 1, &host_mmio->pi); in ahci_host_init()
153 uc_priv->cap = readl(&host_mmio->cap); in ahci_host_init()
154 uc_priv->port_map = readl(&host_mmio->pi); in ahci_host_init()
157 uc_priv->n_ports = (uc_priv->cap & SATA_HOST_CAP_NP_MASK) + 1; in ahci_host_init()
160 uc_priv->cap, uc_priv->port_map, uc_priv->n_ports); in ahci_host_init()
162 for (i = 0; i < uc_priv->n_ports; i++) { in ahci_host_init()
163 uc_priv->port[i].port_mmio = ahci_port_base(host_mmio, i); in ahci_host_init()
164 port_mmio = uc_priv->port[i].port_mmio; in ahci_host_init()
167 tmp = readl(&port_mmio->cmd); in ahci_host_init()
170 * When P#CMD.ST, P#CMD.CR, P#CMD.FRE and P#CMD.FR in ahci_host_init()
178 * clearing P#CMD.ST and waiting for P#CMD.CR to return in ahci_host_init()
182 writel_with_flush(tmp, &port_mmio->cmd); in ahci_host_init()
191 while ((readl(&port_mmio->cmd) & SATA_PORT_CMD_CR) in ahci_host_init()
192 && --timeout) in ahci_host_init()
197 return -1; in ahci_host_init()
201 /* Spin-up device */ in ahci_host_init()
202 tmp = readl(&port_mmio->cmd); in ahci_host_init()
203 writel((tmp | SATA_PORT_CMD_SUD), &port_mmio->cmd); in ahci_host_init()
205 /* Wait for spin-up to finish */ in ahci_host_init()
207 while (!(readl(&port_mmio->cmd) | SATA_PORT_CMD_SUD) in ahci_host_init()
208 && --timeout) in ahci_host_init()
211 debug("Spin-Up can't finish!\n"); in ahci_host_init()
212 return -1; in ahci_host_init()
217 tmp = readl(&port_mmio->ssts); in ahci_host_init()
225 while (!(readl(&port_mmio->serr) | SATA_PORT_SERR_DIAG_X) in ahci_host_init()
226 && --timeout) in ahci_host_init()
230 return -1; in ahci_host_init()
234 * For each implemented Port, clear the P#SERR in ahci_host_init()
238 tmp = readl(&port_mmio->serr); in ahci_host_init()
239 debug("P#SERR 0x%x\n", in ahci_host_init()
241 writel(tmp, &port_mmio->serr); in ahci_host_init()
244 tmp = readl(&host_mmio->is); in ahci_host_init()
247 writel(tmp, &host_mmio->is); in ahci_host_init()
249 writel(1 << i, &host_mmio->is); in ahci_host_init()
252 writel(DEF_PORT_IRQ, &port_mmio->ie); in ahci_host_init()
255 tmp = readl(&port_mmio->ssts); in ahci_host_init()
258 uc_priv->link_port_map |= (0x01 << i); in ahci_host_init()
261 tmp = readl(&host_mmio->ghc); in ahci_host_init()
263 writel(tmp | SATA_HOST_GHC_IE, &host_mmio->ghc); in ahci_host_init()
264 tmp = readl(&host_mmio->ghc); in ahci_host_init()
272 struct sata_host_regs *host_mmio = uc_priv->mmio_base; in ahci_print_info()
277 vers = readl(&host_mmio->vs); in ahci_print_info()
278 cap = uc_priv->cap; in ahci_print_info()
279 impl = uc_priv->port_map; in ahci_print_info()
325 struct ahci_ioports *pp = &uc_priv->port[port]; in ahci_fill_sg()
326 struct ahci_sg *ahci_sg = pp->cmd_tbl_sg; in ahci_fill_sg()
331 sg_count = ((buf_len - 1) / max_bytes) + 1; in ahci_fill_sg()
334 return -1; in ahci_fill_sg()
338 ahci_sg->addr = in ahci_fill_sg()
340 ahci_sg->addr_hi = 0; in ahci_fill_sg()
341 ahci_sg->flags_size = cpu_to_le32(0x3fffff & in ahci_fill_sg()
343 ? (buf_len - 1) in ahci_fill_sg()
344 : (max_bytes - 1))); in ahci_fill_sg()
346 buf_len -= max_bytes; in ahci_fill_sg()
354 struct ahci_cmd_hdr *cmd_hdr = (struct ahci_cmd_hdr *)(pp->cmd_slot + in ahci_fill_cmd_slot()
358 cmd_hdr->opts = cpu_to_le32(opts); in ahci_fill_cmd_slot()
359 cmd_hdr->status = 0; in ahci_fill_cmd_slot()
360 pp->cmd_slot->tbl_addr = cpu_to_le32((u32)pp->cmd_tbl & 0xffffffff); in ahci_fill_cmd_slot()
362 pp->cmd_slot->tbl_addr_hi = in ahci_fill_cmd_slot()
363 cpu_to_le32((u32)(((pp->cmd_tbl) >> 16) >> 16)); in ahci_fill_cmd_slot()
373 struct ahci_ioports *pp = &uc_priv->port[port]; in ahci_exec_ata_cmd()
374 struct sata_port_regs *port_mmio = pp->port_mmio; in ahci_exec_ata_cmd()
378 cmd_slot = AHCI_GET_CMD_SLOT(readl(&port_mmio->ci)); in ahci_exec_ata_cmd()
391 memcpy((u8 *)(pp->cmd_tbl), cfis, sizeof(struct sata_fis_h2d)); in ahci_exec_ata_cmd()
401 flush_cache((int)(pp->cmd_slot), AHCI_PORT_PRIV_DMA_SZ); in ahci_exec_ata_cmd()
402 writel_with_flush(1 << cmd_slot, &port_mmio->ci); in ahci_exec_ata_cmd()
404 if (waiting_for_cmd_completed((u8 *)&port_mmio->ci, 10000, in ahci_exec_ata_cmd()
407 return -1; in ahci_exec_ata_cmd()
409 invalidate_dcache_range((int)(pp->cmd_slot), in ahci_exec_ata_cmd()
410 (int)(pp->cmd_slot)+AHCI_PORT_PRIV_DMA_SZ); in ahci_exec_ata_cmd()
412 pp->cmd_slot->status); in ahci_exec_ata_cmd()
425 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; in ahci_set_feature()
426 cfis->pm_port_c = 1 << 7; in ahci_set_feature()
427 cfis->command = ATA_CMD_SET_FEATURES; in ahci_set_feature()
428 cfis->features = SETFEATURES_XFER; in ahci_set_feature()
429 cfis->sector_count = ffs(uc_priv->udma_mask + 1) + 0x3e; in ahci_set_feature()
436 struct ahci_ioports *pp = &uc_priv->port[port]; in ahci_port_start()
437 struct sata_port_regs *port_mmio = pp->port_mmio; in ahci_port_start()
443 port_status = readl(&port_mmio->ssts); in ahci_port_start()
447 return -1; in ahci_port_start()
454 return -ENOMEM; in ahci_port_start()
457 mem = (mem + 0x400) & (~0x3ff); /* Aligned to 1024-bytes */ in ahci_port_start()
461 * First item in chunk of DMA memory: 32-slot command table, in ahci_port_start()
464 pp->cmd_slot = (struct ahci_cmd_hdr *)mem; in ahci_port_start()
465 debug("cmd_slot = 0x%x\n", (unsigned int) pp->cmd_slot); in ahci_port_start()
469 * Second item: Received-FIS area, 256-Byte aligned in ahci_port_start()
471 pp->rx_fis = mem; in ahci_port_start()
476 * and its scatter-gather table in ahci_port_start()
478 pp->cmd_tbl = mem; in ahci_port_start()
479 debug("cmd_tbl_dma = 0x%lx\n", pp->cmd_tbl); in ahci_port_start()
483 writel_with_flush(0x00004444, &port_mmio->dmacr); in ahci_port_start()
484 pp->cmd_tbl_sg = (struct ahci_sg *)mem; in ahci_port_start()
485 writel_with_flush((u32)pp->cmd_slot, &port_mmio->clb); in ahci_port_start()
486 writel_with_flush(pp->rx_fis, &port_mmio->fb); in ahci_port_start()
489 writel_with_flush((SATA_PORT_CMD_FRE | readl(&port_mmio->cmd)), in ahci_port_start()
490 &port_mmio->cmd); in ahci_port_start()
493 while ((readl(&port_mmio->tfd) & (SATA_PORT_TFD_STS_ERR | in ahci_port_start()
495 && --timeout) in ahci_port_start()
500 return -1; in ahci_port_start()
505 PORT_CMD_START, &port_mmio->cmd); in ahci_port_start()
518 pdev->product, pdev->vendor, pdev->revision, pdev->lba); in dwc_ahsata_print_info()
522 pdev->product, pdev->vendor, pdev->revision, pdev->lba); in dwc_ahsata_print_info()
530 u8 port = uc_priv->hard_port_no; in dwc_ahsata_identify()
534 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; in dwc_ahsata_identify()
535 cfis->pm_port_c = 0x80; /* is command */ in dwc_ahsata_identify()
536 cfis->command = ATA_CMD_ID_ATA; in dwc_ahsata_identify()
545 uc_priv->pio_mask = id[ATA_ID_PIO_MODES]; in dwc_ahsata_xfer_mode()
546 uc_priv->udma_mask = id[ATA_ID_UDMA_MODES]; in dwc_ahsata_xfer_mode()
547 debug("pio %04x, udma %04x\n\r", uc_priv->pio_mask, uc_priv->udma_mask); in dwc_ahsata_xfer_mode()
555 u8 port = uc_priv->hard_port_no; in dwc_ahsata_rw_cmd()
562 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; in dwc_ahsata_rw_cmd()
563 cfis->pm_port_c = 0x80; /* is command */ in dwc_ahsata_rw_cmd()
564 cfis->command = (is_write) ? ATA_CMD_WRITE : ATA_CMD_READ; in dwc_ahsata_rw_cmd()
565 cfis->device = ATA_LBA; in dwc_ahsata_rw_cmd()
567 cfis->device |= (block >> 24) & 0xf; in dwc_ahsata_rw_cmd()
568 cfis->lba_high = (block >> 16) & 0xff; in dwc_ahsata_rw_cmd()
569 cfis->lba_mid = (block >> 8) & 0xff; in dwc_ahsata_rw_cmd()
570 cfis->lba_low = block & 0xff; in dwc_ahsata_rw_cmd()
571 cfis->sector_count = (u8)(blkcnt & 0xff); in dwc_ahsata_rw_cmd()
584 u8 port = uc_priv->hard_port_no; in dwc_ahsata_flush_cache()
588 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; in dwc_ahsata_flush_cache()
589 cfis->pm_port_c = 0x80; /* is command */ in dwc_ahsata_flush_cache()
590 cfis->command = ATA_CMD_FLUSH; in dwc_ahsata_flush_cache()
600 u8 port = uc_priv->hard_port_no; in dwc_ahsata_rw_cmd_ext()
607 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; in dwc_ahsata_rw_cmd_ext()
608 cfis->pm_port_c = 0x80; /* is command */ in dwc_ahsata_rw_cmd_ext()
610 cfis->command = (is_write) ? ATA_CMD_WRITE_EXT in dwc_ahsata_rw_cmd_ext()
613 cfis->lba_high_exp = (block >> 40) & 0xff; in dwc_ahsata_rw_cmd_ext()
614 cfis->lba_mid_exp = (block >> 32) & 0xff; in dwc_ahsata_rw_cmd_ext()
615 cfis->lba_low_exp = (block >> 24) & 0xff; in dwc_ahsata_rw_cmd_ext()
616 cfis->lba_high = (block >> 16) & 0xff; in dwc_ahsata_rw_cmd_ext()
617 cfis->lba_mid = (block >> 8) & 0xff; in dwc_ahsata_rw_cmd_ext()
618 cfis->lba_low = block & 0xff; in dwc_ahsata_rw_cmd_ext()
619 cfis->device = ATA_LBA; in dwc_ahsata_rw_cmd_ext()
620 cfis->sector_count_exp = (blkcnt >> 8) & 0xff; in dwc_ahsata_rw_cmd_ext()
621 cfis->sector_count = blkcnt & 0xff; in dwc_ahsata_rw_cmd_ext()
634 u8 port = uc_priv->hard_port_no; in dwc_ahsata_flush_cache_ext()
638 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; in dwc_ahsata_flush_cache_ext()
639 cfis->pm_port_c = 0x80; /* is command */ in dwc_ahsata_flush_cache_ext()
640 cfis->command = ATA_CMD_FLUSH_EXT; in dwc_ahsata_flush_cache_ext()
648 uc_priv->flags |= SATA_FLAG_WCACHE; in dwc_ahsata_init_wcache()
650 uc_priv->flags |= SATA_FLAG_FLUSH; in dwc_ahsata_init_wcache()
652 uc_priv->flags |= SATA_FLAG_FLUSH_EXT; in dwc_ahsata_init_wcache()
676 blks -= max_blks; in ata_low_level_rw_lba48()
711 blks -= max_blks; in ata_low_level_rw_lba28()
731 linkmap = uc_priv->link_port_map; in dwc_ahci_start_ports()
735 return -ENXIO; in dwc_ahci_start_ports()
738 for (i = 0; i < uc_priv->n_ports; i++) { in dwc_ahci_start_ports()
744 uc_priv->hard_port_no = i; in dwc_ahci_start_ports()
759 u8 port = uc_priv->hard_port_no; in dwc_ahsata_scan_common()
767 memcpy(pdev->product, serial, sizeof(serial)); in dwc_ahsata_scan_common()
771 memcpy(pdev->revision, firmware, sizeof(firmware)); in dwc_ahsata_scan_common()
775 memcpy(pdev->vendor, product, sizeof(product)); in dwc_ahsata_scan_common()
779 pdev->lba = (u32)n_sectors; in dwc_ahsata_scan_common()
781 pdev->type = DEV_TYPE_HARDDISK; in dwc_ahsata_scan_common()
782 pdev->blksz = ATA_SECT_SIZE; in dwc_ahsata_scan_common()
783 pdev->lun = 0; in dwc_ahsata_scan_common()
787 pdev->lba48 = 1; in dwc_ahsata_scan_common()
792 uc_priv->flags &= (~SATA_FLAG_Q_DEP_MASK); in dwc_ahsata_scan_common()
793 uc_priv->flags |= ata_id_queue_depth(id); in dwc_ahsata_scan_common()
818 if (desc->lba48) in sata_read_common()
833 u32 flags = uc_priv->flags; in sata_write_common()
835 if (desc->lba48) { in sata_write_common()
858 uc_priv->dev = pdev; in ahci_init_one()
860 uc_priv->host_flags = ATA_FLAG_SATA in ahci_init_one()
866 uc_priv->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR; in ahci_init_one()
892 if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { in init_sata()
894 return -1; in init_sata()
909 if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { in reset_sata()
911 return -1; in reset_sata()
919 host_mmio = uc_priv->mmio_base; in reset_sata()
920 setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR); in reset_sata()
921 while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR) in reset_sata()
932 if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) in sata_port_status()
933 return -EINVAL; in sata_port_status()
936 return -ENODEV; in sata_port_status()
939 port_mmio = uc_priv->port[port].port_mmio; in sata_port_status()
941 return readl(&port_mmio->ssts) & SATA_PORT_SSTS_DET_MASK; in sata_port_status()
979 port_mmio = uc_priv->port[port].port_mmio; in dwc_ahsata_port_status()
980 return readl(&port_mmio->ssts) & SATA_PORT_SSTS_DET_MASK ? 0 : -ENXIO; in dwc_ahsata_port_status()
986 struct sata_host_regs *host_mmio = uc_priv->mmio_base; in dwc_ahsata_bus_reset()
988 setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR); in dwc_ahsata_bus_reset()
989 while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR) in dwc_ahsata_bus_reset()
1010 IF_TYPE_SATA, -1, 512, 0, &blk); in dwc_ahsata_scan()
1032 uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | in dwc_ahsata_probe()
1034 uc_priv->mmio_base = (void __iomem *)dev_read_addr(dev); in dwc_ahsata_probe()