Lines Matching +full:spi +full:- +full:slave
1 How to port a SPI driver to driver model
4 Here is a rough step-by-step guide. It is based around converting the
5 exynos SPI driver to driver model (DM) and the example code is based
6 around U-Boot v2014.10-rc2 (commit be9f643). This has been updated for
11 Before driver model, SPI drivers have their own private structure which
13 exists, but now it is 'per-child data' for the SPI bus. Each child of the
14 SPI bus is a SPI slave. The information that was stored in the
15 driver-specific slave structure can now be port in private data for the
16 SPI bus.
21 struct spi_slave slave;
25 In this case 'slave' will be in per-child data, and 'ctrl' will be in the
26 SPI's buses private data.
35 - methods to set speed and mode are separated out
36 - cs_info is used to get information on a chip select
39 1. Enable driver mode for SPI and SPI flash
65 return -ENODEV;
70 return -ENODEV;
75 return -ENODEV;
81 return -ENODEV;
87 return -ENODEV;
94 return -ENODEV;
99 return -ENODEV;
104 return -ENODEV;
110 return -ENODEV;
123 { .compatible = "samsung,exynos-spi" },
162 At this point you should be able to build U-Boot for your board with the
163 empty SPI driver. You still have empty methods in your driver, but we will
179 Note that this information is not the run-time information. It should not
181 U-Boot. Run-time information comes later.
183 Here is what was in the exynos spi driver:
187 s32 frequency; /* Default clock frequency, -1 for none */
199 s32 frequency; /* Default clock frequency, -1 for none */
224 struct exynos_spi_platdata *plat = bus->platdata;
225 const void *blob = gd->fdt_blob;
228 plat->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg");
229 plat->periph_id = pinmux_decode_periph_id(blob, node);
231 if (plat->periph_id == PERIPH_ID_NONE) {
233 plat->periph_id);
234 return -FDT_ERR_NOTFOUND;
238 plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
240 plat->deactivate_delay_us = fdtdec_get_int(blob, node,
241 "spi-deactivate-delay", 0);
242 debug("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n",
243 __func__, plat->regs, plat->periph_id, plat->frequency,
244 plat->deactivate_delay_us);
250 8b. Add the platform data [non-device-tree only]
273 while active. This is the run-time information and needs to be stored in
278 struct spi_slave slave;
285 struct spi_bus *bus; /* Pointer to our SPI bus info */
291 the slave structure, so we have:
304 DM can auto-allocate this also:
321 The probe method is supposed to set up the hardware. U-Boot used to use
331 priv->regs = plat->regs;
332 if (plat->periph_id == PERIPH_ID_SPI1 ||
333 plat->periph_id == PERIPH_ID_SPI2)
334 priv->fifo_size = 64;
336 priv->fifo_size = 256;
338 priv->skip_preamble = 0;
339 priv->last_transaction_us = timer_get_us();
340 priv->freq = plat->frequency;
341 priv->periph_id = plat->periph_id;
348 claimed by something that wants to use the SPI bus.
357 This should set up clocks so that the SPI bus is running at the right
361 int spi_claim_bus(struct spi_slave *slave)
363 struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
364 struct exynos_spi *regs = spi_slave->regs;
368 ret = set_spi_clk(spi_slave->periph_id,
369 spi_slave->freq);
371 debug("%s: Failed to setup spi clock\n", __func__);
375 exynos_pinmux_config(spi_slave->periph_id, PINMUX_FLAG_NONE);
377 spi_flush_fifo(slave);
379 reg = readl(®s->ch_cfg);
382 if (spi_slave->mode & SPI_CPHA)
385 if (spi_slave->mode & SPI_CPOL)
388 writel(reg, ®s->ch_cfg);
389 writel(SPI_FB_DELAY_180, ®s->fb_clk);
403 struct exynos_spi_platdata *plat = bus->platdata;
407 if (speed > plat->frequency)
408 speed = plat->frequency;
409 ret = set_spi_clk(priv->periph_id, speed);
412 priv->freq = speed;
413 debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq);
421 This should adjust the SPI mode (polarity, etc.). Again this code probably
430 reg = readl(&priv->regs->ch_cfg);
439 writel(reg, &priv->regs->ch_cfg);
440 priv->mode = mode;
441 debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
451 transfer. Note that this function is wholly internal to the driver - at
452 present the SPI uclass never calls it.
461 exynos_pinmux_config(priv->periph_id, PINMUX_FLAG_NONE);
462 spi_flush_fifo(priv->regs);
464 writel(SPI_FB_DELAY_180, &priv->regs->fb_clk);
471 after it). It only needs access to priv->regs which is why we have
475 * Flush spi tx, rx fifos and reset the SPI controller
477 * @param regs Pointer to SPI registers
481 clrsetbits_le32(®s->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
482 clrbits_le32(®s->ch_cfg, SPI_CH_RST);
483 setbits_le32(®s->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
489 This releases the bus - in our example the old code in spi_release_bus()
496 spi_flush_fifo(priv->regs);
510 If (flags & SPI_XFER_BEGIN) is non-zero then xfer() normally calls an
513 void spi_cs_activate(struct spi_slave *slave)
515 struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
518 if (spi_slave->bus->deactivate_delay_us &&
519 spi_slave->last_transaction_us) {
521 delay_us = timer_get_us() - spi_slave->last_transaction_us;
522 if (delay_us < spi_slave->bus->deactivate_delay_us)
523 udelay(spi_slave->bus->deactivate_delay_us - delay_us);
526 clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
527 debug("Activate CS, bus %d\n", spi_slave->slave.bus);
528 spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE;
535 struct udevice *bus = dev->parent;
540 if (pdata->deactivate_delay_us &&
541 priv->last_transaction_us) {
543 delay_us = timer_get_us() - priv->last_transaction_us;
544 if (delay_us < pdata->deactivate_delay_us)
545 udelay(pdata->deactivate_delay_us - delay_us);
548 clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT);
549 debug("Activate CS, bus '%s'\n", bus->name);
550 priv->skip_preamble = priv->mode & SPI_PREAMBLE;
558 16. Set up the per-child data and child pre-probe function
560 To minimise the pain and complexity of the SPI subsystem while the driver
561 model change-over is in place, struct spi_slave is used to reference a
562 SPI bus slave, even though that slave is actually a struct udevice. In fact
575 Sometimes it is useful to know whether a SPI chip select is valid, but this
580 Return -ENODEV if the supplied chip select is invalid, or 0 if it is valid.
581 If you don't provide the cs_info() method, -ENODEV is assumed for all
597 20. A little note about SPI uclass features:
599 The SPI uclass keeps some information about each device 'dev' on the bus:
601 struct dm_spi_slave_platdata - this is device_get_parent_platdata(dev)
605 be changed at run-time after being set up because platform
606 data is supposed to be immutable at run-time.
607 struct spi_slave - this is device_get_parentdata(dev)
608 Already mentioned above. It holds run-time information about
611 There are also some SPI uclass methods that get called behind the scenes:
613 spi_post_bind() - called when a new bus is bound
617 into the parent (per-child) platform data.
618 spi_child_post_bind() - called when a new child is bound
620 into the per-child platform data
621 spi_child_pre_probe() - called before a new child is probed
628 The above housekeeping makes it easier to write your SPI driver.