device-tree-bindings/pci/armada8k-pcie.txt

1 Armada-8K PCIe DT details:
4 Armada-8k uses synopsis designware PCIe controller.
7 - compatible : should be "marvell,armada8k-pcie", "snps,dw-pcie".
8 - reg: base addresses and lengths of the pcie control and global control registers.
10  points to the pcie configuration registers as mentioned in dw-pcie dt bindings in the link below.
11 - interrupt-map-mask and interrupt-map, standard PCI properties to
12   define the mapping of the PCIe interface to interrupt numbers.
13 - All other definitions as per generic PCI bindings
15 "Documentation/devicetree/bindings/pci/designware-pcie.txt"
18 PHY support is still not supported for armada-8k, once it will, the following parameters can be use…
19 - phys		    : phandle to phy node associated with pcie controller.
20 - phy-names	    : must be "pcie-phy"
21 - marvell,reset-gpio :  specifies a gpio that needs to be activated for plug-in
25 cpm_pcie0: pcie@f2600000 {
26 	compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
29 	reg-names = "ctrl", "config";
30 	#address-cells = <3>;
31 	#size-cells = <2>;
32 	#interrupt-cells = <1>;
34 	dma-coherent;
36 	bus-range = <0 0xff>;
40 		/* non-prefetchable memory */
42 	interrupt-map-mask = <0 0 0 0>;
43 	interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
45 	num-lanes = <1>;
47 	marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>;