Lines Matching refs:NAND

1 NAND FLASH commands and notes
16 Print information about the current NAND device.
41 Print information about all of the NAND devices found.
44 Read `size' bytes from `ofs' in NAND flash to `addr'. Blocks that
50 `ofs' in NAND flash to `addr'. This is limited to the 16 bytes of
55 Write `size' bytes from `addr' to `ofs' in NAND flash. Blocks that
67 the NAND flash in a manner identical to the 'nand write' command
70 NAND flash. This behaviour is required when flashing UBI images
77 corresponding to `ofs' in NAND flash. This is limited to the 16 bytes
83 Read or write one or more pages at "ofs" in NAND flash, from or to
93 NAND Offset from where SPL will read u-boot image. This is the starting
94 address of u-boot MTD partition in NAND.
97 Enables NAND support and commands.
103 The maximum number of NAND devices you want to support.
116 The maximum number of NAND chips per device to be supported.
131 each NAND device on the board, that performs all initialization
172 transition to delayed NAND initialization.
187 GPMC controller is used for parallel NAND flash devices, and can
201 Enables SPL-NAND driver (am335x_spl_bch.c) which supports ELM based
203 hardware engine and use NAND boot mode.
206 SPL-NAND driver with software ECC correction support.
209 On OMAP platforms, this CONFIG specifies NAND ECC scheme.
245 store ECC. So choice of ECC scheme is limited by NAND oobsize.
251 OOB/spare area per NAND page.
252 NAND_PAGESIZE = bytes in main-area of NAND page.
260 example to check for BCH16 on 2K page NAND
264 Thus BCH16 cannot be supported on 2K page NAND.
266 However, for 4K pagesize NAND
271 Thus BCH16 can be supported on 4K page NAND.
284 the current NAND system but has not yet been adapted to the u-boot
287 Additional improvements to the NAND subsystem by Guido Classen, 10-10-2006
315 It can also be used manually by users having seen some NAND errors in logs to
319 in order to program or update safely firmware to NAND, especially for the UBI
322 one call. If size is not a multiple of the NAND's erase size, then the block
327 NAND locking command (for chips with active LOCKPRE pin)
330 set NAND chip to lock state (all pages locked)
333 set NAND chip to lock tight state (software can't change locking anymore)
344 I have tested the code with board containing 128MiB NAND large page chips