Lines Matching +full:per +full:- +full:board
2 ----------------------
7 - MSR[DE] must be set
8 - A valid opcode must be fetchable, through the MMU, from the debug
11 To maximize the time during which this requirement is met, U-Boot sets MSR[DE]
15 where U-Boot currently executes from.
21 ----------------
26 ----------------------------------------------
40 TLB Entries during u-boot execution
41 -----------------------------------
50 EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_MONITOR_BASE
56 EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_MONITOR_BASE
62 EPN -->RPN : CONFIG_SYS_INIT_RAM_ADDR --> CONFIG_SYS_INIT_RAM_ADDR
68 EPN -->RPN : CONFIG_SYS_CCSRBAR --> CONFIG_SYS_CCSRBAR
75 6) Create TLB entries as per boards/freescale/<board>/tlb.c
76 Location : cpu_init_early_f --> init_tlbs()
81 Location : cpu_init_f --> disable_tlb()
87 EPN -->RPN : CONFIG_SYS_FLASH_BASE --> CONFIG_SYS_FLASH_BASE_PHYS
88 Properties : Board specific size, AS0, I, G, IPROT
97 EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
100 EPN -->RPN : CONFIG_SYS_MONITOR_BASE & 0xffc00000 --> 0xffc00000
108 EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
111 EPN -->RPN : CONFIG_SYS_MONITOR_BASE & 0xffc00000 --> 0xffc00000
118 EPN -->RPN : CONFIG_SYS_INIT_RAM_ADDR --> CONFIG_SYS_INIT_RAM_ADDR
124 EPN -->RPN : CONFIG_SYS_CCSRBAR --> CONFIG_SYS_CCSRBAR
130 EPN -->RPN : SRAM_BASE_ADDR --> SRAM_BASE_ADDR
134 Location : cpu_init_early_f --> setup_ifc
136 EPN -->RPN : Adjusted flash_phys --> Adjusted flash_phys
140 Location : cpu_init_early_f --> setup_ifc
142 EPN -->RPN : Adjusted flash_phys --> Adjusted flash_phys
149 9) Create TLB entries as per boards/freescale/<board>/tlb.c
150 Location : cpu_init_early_f --> init_tlbs()
155 Location : cpu_init_f --> disable_tlb()
159 Location : Board_init_f -> dram_init
165 EPN -->RPN : CONFIG_SYS_FLASH_BASE --> CONFIG_SYS_FLASH_BASE_PHYS
166 Properties : Board specific size, AS0, I, G, IPROT