u-boot/doc/README.mpc85xx

2 ----------------------
7 	- MSR[DE] must be set
8 	- A valid opcode must be fetchable, through the MMU, from the debug
11 To maximize the time during which this requirement is met, U-Boot sets MSR[DE]
12 immediately on entry and keeps it set. It also uses a temporary TLB to keep a
15 where U-Boot currently executes from.
21 ----------------
26 ----------------------------------------------
40 TLB Entries during u-boot execution
41 -----------------------------------
45 A) defined(CONFIG_SYS_RAMBOOT) i.e. SD, SPI, NAND RAMBOOT & NAND_SPL boot
47    1) TLB entry to overcome e500 v1/v2 debug restriction
49        TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
50        EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_MONITOR_BASE
51        Properties : 256K, AS0, I, IPROT
53    2) TLB entry for working in AS1
55        TLB Entry  : 15
56        EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_MONITOR_BASE
57        Properties : 1M, AS1, I, G, IPROT
59    3) TLB entry for the stack during AS1
61        TLB Entry  : 14
62        EPN -->RPN : CONFIG_SYS_INIT_RAM_ADDR --> CONFIG_SYS_INIT_RAM_ADDR
65    4) TLB entry for CCSRBAR during AS1 execution
67        TLB Entry  : 13
68        EPN -->RPN : CONFIG_SYS_CCSRBAR --> CONFIG_SYS_CCSRBAR
69        Properties : 1M, AS1, I, G
71    5) Invalidate unproctected TLB Entries
75    6) Create TLB entries as per boards/freescale/<board>/tlb.c
76        Location	  : cpu_init_early_f --> init_tlbs()
78       Please note It can overwrites previous TLB Entries.
80    7) Disable TLB Entries of AS1
81        Location	  : cpu_init_f --> disable_tlb()
84    8) Update Flash's TLB entry
86        TLB entry  : Search from TLB entries
87        EPN -->RPN : CONFIG_SYS_FLASH_BASE --> CONFIG_SYS_FLASH_BASE_PHYS
88        Properties : Board specific size, AS0, I, G, IPROT
91 B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot
93    1) TLB entry to overcome e500 v1/v2 debug restriction
95        TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
97        EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
98        Properties : 1M, AS1, I, G, IPROT
100        EPN -->RPN : CONFIG_SYS_MONITOR_BASE & 0xffc00000 --> 0xffc00000
101        Properties : 4M, AS0, I, G, IPROT
104    2) TLB entry for working in AS1
106        TLB Entry  : 15
108        EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
109        Properties : 1M, AS1, I, G, IPROT
111        EPN -->RPN : CONFIG_SYS_MONITOR_BASE & 0xffc00000 --> 0xffc00000
112        Properties : 4M, AS1, I, G, IPROT
115    3) TLB entry for the stack during AS1
117        TLB Entry  : 14
118        EPN -->RPN : CONFIG_SYS_INIT_RAM_ADDR --> CONFIG_SYS_INIT_RAM_ADDR
121    4) TLB entry for CCSRBAR during AS1 execution
123        TLB Entry  : 13
124        EPN -->RPN : CONFIG_SYS_CCSRBAR --> CONFIG_SYS_CCSRBAR
125        Properties : 1M, AS1, I, G
127    5) TLB entry for Errata workaround CONFIG_SYS_FSL_ERRATUM_IFC_A003399
129        TLB Entry  : 9
130        EPN -->RPN : SRAM_BASE_ADDR --> SRAM_BASE_ADDR
131        Properties : 1M, AS1, I
134        Location	  : cpu_init_early_f --> setup_ifc
135        TLB Entry  : Get Flash TLB
136        EPN -->RPN : Adjusted flash_phys --> Adjusted flash_phys
137        Properties : 4M, AS1, I, G, IPROT
140        Location	  : cpu_init_early_f --> setup_ifc
141        TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
142        EPN -->RPN : Adjusted flash_phys --> Adjusted flash_phys
143        Properties : 4M, AS0, I, G, IPROT
145    8) Invalidate unproctected TLB Entries
149    9) Create TLB entries as per boards/freescale/<board>/tlb.c
150        Location	  : cpu_init_early_f --> init_tlbs()
152       Note: It can overwrites previous TLB Entries
154    10) Disable TLB Entries of AS1
155        Location	  : cpu_init_f --> disable_tlb()
158    11) Create DDR's TLB entriy
159        Location	  : Board_init_f -> dram_init
160        TLB entry  : Search free TLB entry
162    12) Update Flash's TLB entry
164        TLB entry  : Search from TLB entries
165        EPN -->RPN : CONFIG_SYS_FLASH_BASE --> CONFIG_SYS_FLASH_BASE_PHYS
166        Properties : Board specific size, AS0, I, G, IPROT