u-boot/doc/README.POST

1 Power-On-Self-Test support in U-Boot
4 This project is to support Power-On-Self-Test (POST) in U-Boot.
11    and running Power-On-Self-Test in U-Boot. This framework shall
34    o) CPU test
35    o) Cache test
36    o) Memory test
37    o) Ethernet test
38    o) Serial channels test
39    o) Watchdog timer test
40    o) RTC test
41    o) I2C test
42    o) SPI test
43    o) USB test
68      power-on reset (e.g. watchdog test)
73      time and can be run on the regular basis (e.g. CPU test)
75   3) Tests running in special "slow test mode" only
78      and cannot be run regularly (e.g. strong memory test, I2C test)
85 For example, SDRAM test may run in both normal and "slow test" mode.
86 In normal mode, SDRAM test may perform a fast superficial memory test
87 only, while running in slow test mode it may perform a full memory
106 may cause system rebooting (e.g. watchdog test). For such tests, the
107 layer will automatically detect rebooting and will notify the test
117 #define POST_POWERON		0x01	/* test runs on power-on booting */
118 #define POST_NORMAL		0x02	/* test runs on normal booting */
119 #define POST_SLOWTEST		0x04	/* test is slow, enabled by key press */
120 #define POST_POWERTEST		0x08	/* test runs after watchdog reset */
121 #define POST_ROM		0x100	/* test runs in ROM */
122 #define POST_RAM		0x200	/* test runs in RAM */
123 #define POST_MANUAL		0x400	/* test can be executed manually */
124 #define POST_REBOOT		0x800	/* test may cause rebooting */
125 #define POST_PREREL             0x1000  /* test runs before relocation */
131      This routine will run the test (or the group of tests) specified
133      argument is not NULL, the test with this name will be performed,
138      mode the test is executed in (power-on, normal, power-fail,
144      relocate the POST test table.
150      particular test if name is not NULL.
178      versus "slow" test mode).
189     int (*test)(bd_t *bd, int flags);
194      This field will contain a short name of the test, which will be
195      used in logs and on listing POST tests (e.g. CPU test).
199      This field will keep a name for identifying the test on manual
205      This field will contain a detailed description of the test,
212      above, which will specify the mode the test is running in
217   o) test
220      perform the test, which will take 2 arguments. The first
223      mode the test is running in (POST_POWERON, POST_NORMAL,
225      the test caused system rebooting (POST_REBOOT). The routine will
226      return 0 on successful execution of the test, and 1 if the test
234 2.1.2. Test results
242 <test-specific output>
262 		"On-board peripherals test", "board", \
263 		"  This test performs full check-up of the " \
276 		"Cache test", "cache", \
277 		"  This test verifies the CPU cache operation.", \
284 tests. Each POST test in this directory will be placed into a
288 way will be used only if the test subtantially uses the driver.
307   cache             - cache test
308   cpu               - CPU test
309   enet              - SCC/FCC ethernet test
318 cpu - CPU test
319   This test verifies the arithmetic logic unit of CPU.
320 cache - cache test
321   This test verifies the CPU cache operation.
352 test, this means successful operation of the timer.
358 the POST layer will store an identification number of the test in a
361 failed one. On second execution of the failed test, the POST_REBOOT
362 bit flag will be set in the flag argument to the test routine. This
364 example, the watchdog timer test may have the following
370 		"Watchdog timer test", "watchdog", \
371 		"  This test checks the watchdog timer.", \
383 		/* Test passed */
407   o) CPU test
409      This test will check the arithmetic logic unit (ALU) of CPU. The
410      test will take several milliseconds and will run on normal
413   o) Cache test
415      This test will verify the CPU cache (L1 cache). The test will
418   o) Memory test
420      This test will examine RAM and check it for errors. The test
425 2.2.1.1. CPU test
427 This test will verify the following ALU instructions:
452      To verify these instructions the test will run them with
455      the test will contain a pre-built table containing the
456      description of each test case: the instruction, the values of
466      The test will contain a pre-built table of instructions,
468      register. For each table entry, the test will cyclically use
481      The test scheme will be identical to that from the previous
489      The test scheme will be identical to that from the previous
513      +7]. The test cases will be composed so that they will not cause
514      alignment exceptions. The test will contain a pre-built table
515      describing all test cases. For store instructions, the table
518      executing the instruction, the test will verify the contents of
524      the test will verify the value of the destination register and
531 The CPU test will run in RAM in order to allow run-time modification
538 2.2.1.3. Cache test
540 To verify the data cache operation the following test scenarios will
543   1) Basic test #1
553   2) Basic test #2
566   3) Write-through mode test
579   4) Write-back mode test
592 To verify the instruction cache operation the following test
595   1) Basic test #1
605   2) Basic test #2
617 The CPU test will run in RAM in order to allow run-time modification
620 2.2.1.4. Memory test
622 The memory test will verify RAM using sequential writes and reads
623 to/from RAM. Specifically, there will be several test cases that will
624 use different patterns to verify RAM. Each test case will first fill
643 Being run in normal mode, the test will verify only small 4Kb regions
647 0x04000000. If the test is run in power-fail mode, it will verify the
650 The memory test will run in ROM before relocating U-Boot to RAM in
659 2.2.2.1. I2C test
663 CONFIG_SYS_POST_I2C_ADDRS the I2C test will pass if all devices
666 the test will pass if any I2C device is found.
670 CONFIG_SYS_POST_I2C_ADDRS.  The I2C POST test will pass regardless
676 2.2.2.2. Watchdog timer test
678 To test the watchdog timer the scheme mentioned above (refer to
679 section "Hazardous tests") will be used. Namely, this test will be
681 test routine will make a 10-second delay. If the system does not
683 the test fails. If the system reboots, on the second iteration the
684 POST_REBOOT bit will be set in the flag argument to the test routine.
685 The test routine will check this bit and report a success if it is
688 2.2.2.3. RTC test
690 The RTC test will use the rtc_get()/rtc_set() routines. The following
701      boundary and reading it after its passing the boundary. The test
716 The internal (local) loopback mode will be used to test SCC. To do
722 The test routines for the SCC ethernet tests will be located in
731 "external" loopback test using a loopback cable. In this case, the
732 test will be executed manually.
734 The test routine for the SMC/SCC UART tests will be located in
737 2.2.3.3. USB test
741 2.2.3.4. SPI test