u-boot/doc/README.POST

17       Also, standalone POST tests shall be supported.
28 2) The results of tests shall be saved so that it will be possible to
31 3) The following POST tests shall be developed for MPC823E-based
45 4) The LWMON board shall be used for reference.
50 The whole project can be divided into two independent tasks:
56 A new optional module will be added to U-Boot, which will run POST
61 The list of available POST tests will be configured at U-Boot build
63 tests. All POST tests will be divided into the following groups:
73      time and can be run on the regular basis (e.g. CPU test)
78      and cannot be run regularly (e.g. strong memory test, I2C test)
82      This group will contain those tests that can be run manually.
90 Also, all tests will be discriminated by the moment they run at.
91 Specifically, the following groups will be singled out:
115 The following flags will be defined:
123 #define POST_MANUAL		0x400	/* test can be executed manually */
133      argument is not NULL, the test with this name will be performed,
135      argument) will be executed. This routine will be called at least
143      This routine will be called from board_init_r() and will
148      This routine will print the list of all POST tests that can be
154      This routine will be called from POST tests to log their
157      will be identical to the printf() routine.
159 Also, the following board-specific routines will be called from the
170      will be called on power-fail booting after running all POST
177      power-on long-running tests shall be executed or not ("normal"
180 The list of available POST tests be kept in the post_tests array
182 be as follows:
194      This field will contain a short name of the test, which will be
206      which will be printed on user request. For more information, see
214      should be run at (before or after relocating to RAM), whether it
221      argument will be a pointer to the board info structure, while
222      the second will be a combination of bit flags specifying the
229 The lists of the POST tests that should be run at power-on/normal/
230 power-fail booting will be kept in the environment. Namely, the
231 following environment variables will be used: post_poweron,
236 The results of tests will be collected by the POST layer. The POST
247 Basically, the results of tests will be printed to stderr. This
248 feature may be enhanced in future to spool the log to a serial line,
254 All POST-related code will be #ifdef'ed with the CONFIG_POST macro.
255 This macro will be defined in the config_<board>.h file for those
269 A new file, post.h, will be created in the include/ directory. This
271 macros that will be reused for defining CONFIG_POST. As an example,
272 the following macro may be defined:
282 A new subdirectory will be created in the U-Boot root directory. It
284 tests. Each POST test in this directory will be placed into a
285 separate file (it will be needed for building standalone tests). Some
286 POST tests (mainly those for testing peripheral devices) will be
288 way will be used only if the test subtantially uses the driver.
293 user-space library will be developed to provide the POST interface
298 A new command, diag, will be added to U-Boot. This command will be
315 descriptions of the specified tests will be printed:
324 If the first argument to diag is 'run', the specified tests will be
325 executed. If no tests are specified, all available tests will be
328 It will be prohibited to execute tests running in ROM manually. The
333 The Linux kernel will be modified to detect power failures and
334 automatically reboot the system in such cases. It will be assumed
341 way. This feature will be configured in/out from the kernel
345 power-fail mode. If it does, the system will be powered off after
354 In order to support such tests, the following scheme will be
362 bit flag will be set in the flag argument to the test routine. This
400 systems. This section provides technical details of how it will be
405 The following generic POST tests will be developed:
422      amount of RAM will be checked. On power-fail booting a fool
423      memory check-up will be performed.
434      The mtcrf/mfcr instructions will be tested by loading different
437      the expected one. The mcrxr instruction will be tested by
441      register with the expected one. The rest of instructions will be
471      iteration r0/r1 will be used as operands and r2 for result. On
472      the second iteration, r1/r2 will be used as operands and r3 as
481      The test scheme will be identical to that from the previous
489      The test scheme will be identical to that from the previous
496      The first 2 instructions (b, bl) will be verified by jumping to
499      register will be checked as well (using mfspr). To verify the bc
501      and the condition register values will be checked. The list of
502      such combinations will be pre-built and linked in U-Boot at
510      All operations will be performed on a 16-byte array. The array
511      will be 4-byte aligned. The base register will point to offset
513      +7]. The test cases will be composed so that they will not cause
541 be used:
551     The negative pattern must be read at the last step
564     The negative pattern must be read at the last step
577     The negative pattern must be read at the last step
590     The negative pattern must be read at the last step
593 scenarios will be used:
623 to/from RAM. Specifically, there will be several test cases that will
626 compare its contents with the pattern. The following patterns will be
636 be used to detect adherent bits, i.e. bits whose state may randomly
637 change if adjacent bits are modified. The last pattern will be used
645 following areas will be verified: 0x00000000-0x00000800,
661 For verifying the I2C bus, a full I2C bus scanning will be performed
668 The CONFIG_SYS_POST_I2C_IGNORES define can be used to list I2C
669 devices which may or may not be present when using
673 daughtercard that may or may not be present) or not critical
679 section "Hazardous tests") will be used. Namely, this test will be
684 POST_REBOOT bit will be set in the flag argument to the test routine.
691 features will be verified:
695      This will be verified by reading RTC in polling within a short
700      This will be checked by setting RTC to a second before a month
702      will be performed for both leap- and nonleap-years.
708 MPC8xx communication processor module (CPM) will be tested:
716 The internal (local) loopback mode will be used to test SCC. To do
717 that the controllers will be configured accordingly and several
718 packets will be transmitted. These tests may be enhanced in future to
722 The test routines for the SCC ethernet tests will be located in
727 To perform these tests the internal (local) loopback mode will be
728 used. The SMC/SCC controllers will be configured to connect the
730 will be transmitted. These tests may be enhanced to make to perform
732 test will be executed manually.
734 The test routine for the SMC/SCC UART tests will be located in