44 	busdevfn = pci_find_device(LPCI_VENDOR, LPCI_DEVICE, 0);  in tsi148_init()
51 	pci_write_config_dword(busdevfn, 0x0c, 0);  in tsi148_init()
59 	memset(dev, 0, sizeof(*dev));  in tsi148_init()
63 	val &= ~0xf;  in tsi148_init()
83 	for (j = 0; j < 8; j++) {  in tsi148_init()
84 		__raw_writel(htonl(0x00000000), &dev->uregs->outbound[j].otat);  in tsi148_init()
85 		__raw_writel(htonl(0x00000000), &dev->uregs->inbound[j].itat);  in tsi148_init()
89 	__raw_writel(htonl(0x00000084), &dev->uregs->vctrl);  in tsi148_init()
92 	if ((__raw_readl(&dev->uregs->vstat) & 0x00000100) != 0)  in tsi148_init()
102 	__raw_writel(htonl(0x00000000), &dev->uregs->inten);  in tsi148_init()
104 	__raw_writel(htonl(0x00000000), &dev->uregs->inteo);  in tsi148_init()
107 	__raw_writel(htonl(0x03ff3f00), &dev->uregs->intc);  in tsi148_init()
108 	/* Map all ints to 0 */  in tsi148_init()
109 	__raw_writel(htonl(0x00000000), &dev->uregs->intm1);  in tsi148_init()
110 	__raw_writel(htonl(0x00000000), &dev->uregs->intm2);  in tsi148_init()
114 	val &= ~(0x00004000);  in tsi148_init()
120 	return 0;  in tsi148_init()
136 	unsigned int ctl = 0;  in tsi148_pci_slave_window()
143 	for (i = 0; i < 8; i++) {  in tsi148_pci_slave_window()
144 		if (0x00000000 == readl(&dev->uregs->outbound[i].otat))  in tsi148_pci_slave_window()
159 	__raw_writel(0x00000000, &dev->uregs->outbound[i].otsau);  in tsi148_pci_slave_window()
161 	__raw_writel(0x00000000, &dev->uregs->outbound[i].oteau);  in tsi148_pci_slave_window()
163 	__raw_writel(0x00000000, &dev->uregs->outbound[i].otofu);  in tsi148_pci_slave_window()
167 		ctl = 0x00000000;  in tsi148_pci_slave_window()
170 		ctl = 0x00000001;  in tsi148_pci_slave_window()
173 		ctl = 0x00000002;  in tsi148_pci_slave_window()
179 		ctl |= 0x00000000;  in tsi148_pci_slave_window()
182 		ctl |= 0x00000010;  in tsi148_pci_slave_window()
187 		ctl |= 0x00000020;  in tsi148_pci_slave_window()
191 		ctl |= 0x00000000;  in tsi148_pci_slave_window()
194 		ctl |= 0x00000040;  in tsi148_pci_slave_window()
198 	ctl |= 0x80040000;	/* enable, no prefetch */  in tsi148_pci_slave_window()
213 	return 0;  in tsi148_pci_slave_window()
221 	unsigned int ctl = 0;  in tsi148_eval_vam()
225 		ctl = 0x00000000;  in tsi148_eval_vam()
228 		ctl = 0x00000010;  in tsi148_eval_vam()
231 		ctl = 0x00000020;  in tsi148_eval_vam()
236 		ctl |= 0x00000001;  in tsi148_eval_vam()
239 		ctl |= 0x00000002;  in tsi148_eval_vam()
242 		ctl |= 0x00000003;  in tsi148_eval_vam()
247 		ctl |= 0x00000008;  in tsi148_eval_vam()
249 		ctl |= 0x00000004;  in tsi148_eval_vam()
261 	unsigned int ctl = 0;  in tsi148_vme_slave_window()
268 	for (i = 0; i < 8; i++) {  in tsi148_vme_slave_window()
269 		if (0x00000000 == readl(&dev->uregs->inbound[i].itat))  in tsi148_vme_slave_window()
282 	__raw_writel(0x00000000, &dev->uregs->inbound[i].itsau);  in tsi148_vme_slave_window()
284 	__raw_writel(0x00000000, &dev->uregs->inbound[i].iteau);  in tsi148_vme_slave_window()
287 		__raw_writel(0xffffffff, &dev->uregs->inbound[i].itofu);  in tsi148_vme_slave_window()
289 		__raw_writel(0x00000000, &dev->uregs->inbound[i].itofu);  in tsi148_vme_slave_window()
292 	ctl |= 0x80000000;	/* enable */  in tsi148_vme_slave_window()
306 	return 0;  in tsi148_vme_slave_window()
320 	result = 0;  in tsi148_vme_gcsr_window()
326 		__raw_writel(0x00000000, &dev->uregs->gbau);  in tsi148_vme_gcsr_window()
329 		ctl |= 0x00000080;	/* enable */  in tsi148_vme_gcsr_window()
344 	result = 0;  in tsi148_vme_crcsr_window()
350 		__raw_writel(0x00000000, &dev->uregs->crou);  in tsi148_vme_crcsr_window()
352 		ctl = 0x00000080;	/* enable */  in tsi148_vme_crcsr_window()
367 	result = 0;  in tsi148_vme_crg_window()
373 		__raw_writel(0x00000000, &dev->uregs->cbau);  in tsi148_vme_crg_window()
376 		ctl |= 0x00000080;	/* enable */  in tsi148_vme_crg_window()
388 	ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0;  in do_tsi148()
393 		cmd = argv[1][0];  in do_tsi148()
407 		if (strcmp(argv[1], "crg") == 0) {  in do_tsi148()
445 	return 0;  in do_tsi148()