udoo/neo/neo.c

2  * Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
9  * SPDX-License-Identifier:	GPL-2.0+
14 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/mx6-pins.h>
18 #include <asm/mach-imx/iomux-v3.h>
23 #include <asm/mach-imx/mxc_i2c.h>
78 	gd->ram_size = imx_ddr_size();  in dram_init()
110 	p = pmic_get("PFUZE3000");  in power_init_board()
117 	printf("PMIC:  PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);  in power_init_board()
285 	reg = readl(&anatop->pll_enet);  in setup_fec()
287 	writel(reg, &anatop->pll_enet);  in setup_fec()
305 		return -EINVAL;  in board_eth_init()
311 		return -EINVAL;  in board_eth_init()
325 	if (phydev->drv->config)  in board_phy_config()
326 		phydev->drv->config(phydev);  in board_phy_config()
334 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;  in board_init()
373 	 * Machine selection -  in get_board_value()
375 	 * ---------------------------------  in get_board_value()
412 	gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;  in board_mmc_init()
449 #include <asm/arch/mx6-ddr.h>
534 	writel(0xFFFFFFFF, &ccm->CCGR0);  in ccgr_init()
535 	writel(0xFFFFFFFF, &ccm->CCGR1);  in ccgr_init()
536 	writel(0xFFFFFFFF, &ccm->CCGR2);  in ccgr_init()
537 	writel(0xFFFFFFFF, &ccm->CCGR3);  in ccgr_init()
538 	writel(0xFFFFFFFF, &ccm->CCGR4);  in ccgr_init()
539 	writel(0xFFFFFFFF, &ccm->CCGR5);  in ccgr_init()
540 	writel(0xFFFFFFFF, &ccm->CCGR6);  in ccgr_init()
541 	writel(0xFFFFFFFF, &ccm->CCGR7);  in ccgr_init()
583 	/* UART clocks enabled and gd valid - init serial console */  in board_init_f()
590 	memset(__bss_start, 0, __bss_end - __bss_start);  in board_init_f()