timll/devkit3250/devkit3250.c

4  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
6  * SPDX-License-Identifier:	GPL-2.0+
13 #include <asm/arch/emc.h>
19 static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;  variable
26 	setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);  in reset_periph()
27 	writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl);  in reset_periph()
30 	writel(0, &wdt->mctrl);  in reset_periph()
31 	clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);  in reset_periph()
57 	gd->bd->bi_boot_params  = CONFIG_SYS_SDRAM_BASE + 0x100;  in board_init()
60 	/* Use 16-bit memory interface for NOR Flash */  in board_init()
61 	emc->stat[0].config	= EMC_STAT_CONFIG_PB | EMC_STAT_CONFIG_16BIT;  in board_init()
63 	/* Change the NOR timings to optimum value to get maximum bandwidth */  in board_init()
64 	emc->stat[0].waitwen	= EMC_STAT_WAITWEN(1);  in board_init()
65 	emc->stat[0].waitoen	= EMC_STAT_WAITOEN(0);  in board_init()
66 	emc->stat[0].waitrd	= EMC_STAT_WAITRD(12);  in board_init()
67 	emc->stat[0].waitpage	= EMC_STAT_WAITPAGE(12);  in board_init()
68 	emc->stat[0].waitwr	= EMC_STAT_WAITWR(5);  in board_init()
69 	emc->stat[0].waitturn	= EMC_STAT_WAITTURN(2);  in board_init()
77 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,  in dram_init()