ti/dra7xx/evm.c

312 	.mpu.value[OPP_NOM]	= VDD_MPU_DRA7_NOM,
313 	.mpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_MPU_NOM,
319 	.eve.value[OPP_NOM]	= VDD_EVE_DRA7_NOM,
322 	.eve.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_DSPEVE_NOM,
330 	.gpu.value[OPP_NOM]	= VDD_GPU_DRA7_NOM,
333 	.gpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_GPU_NOM,
341 	.core.value[OPP_NOM]	= VDD_CORE_DRA7_NOM,
342 	.core.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_CORE_NOM,
347 	.iva.value[OPP_NOM]	= VDD_IVA_DRA7_NOM,
350 	.iva.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_IVA_NOM,
360 	.mpu.value[OPP_NOM]	= VDD_MPU_DRA7_NOM,
361 	.mpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_MPU_NOM,
367 	.core.value[OPP_NOM]	= VDD_CORE_DRA7_NOM,
368 	.core.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_CORE_NOM,
377 	.gpu.value[OPP_NOM]	= VDD_GPU_DRA7_NOM,
380 	.gpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_GPU_NOM,
388 	.eve.value[OPP_NOM]	= VDD_EVE_DRA7_NOM,
391 	.eve.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_DSPEVE_NOM,
399 	.iva.value[OPP_NOM]	= VDD_IVA_DRA7_NOM,
402 	.iva.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_IVA_NOM,
416 	.mpu.value[OPP_NOM]	= VDD_MPU_DRA7_NOM,
417 	.mpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_MPU_NOM,
423 	.core.value[OPP_NOM]		= VDD_CORE_DRA7_NOM,
424 	.core.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_CORE_NOM,
429 	.gpu.value[OPP_NOM]	= VDD_GPU_DRA7_NOM,
430 	.gpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_GPU_NOM,
440 	.eve.value[OPP_NOM]	= VDD_EVE_DRA7_NOM,
442 	.eve.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_DSPEVE_NOM,
449 	.iva.value[OPP_NOM]	= VDD_IVA_DRA7_NOM,
451 	.iva.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_IVA_NOM,
468 			opp = OPP_NOM;  in get_voltrail_opp()
474 			opp = OPP_NOM;  in get_voltrail_opp()
480 			opp = OPP_NOM;  in get_voltrail_opp()
490 			opp = OPP_NOM;  in get_voltrail_opp()
500 			opp = OPP_NOM;  in get_voltrail_opp()
503 		opp = OPP_NOM;  in get_voltrail_opp()