Lines Matching +full:anatop +full:- +full:enable +full:- +full:bit

4  * SPDX-License-Identifier:	GPL-2.0+
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/mx7-pins.h>
13 #include <asm/mach-imx/iomux-v3.h>
14 #include <asm/mach-imx/mxc_i2c.h>
62 	gd->ram_size = PHYS_SDRAM_SIZE;  in dram_init()
180 	/* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17] */  in setup_fec()
181 	clrsetbits_le32(&iomuxc_gpr_regs->gpr[1],  in setup_fec()
192 	/* To enable AR8035 ouput a 125MHz clk from CLK_25M */  in board_phy_config()
208 	if (phydev->drv->config)  in board_phy_config()
209 		phydev->drv->config(phydev);  in board_phy_config()
253 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;  in board_init()
271 	 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),  in board_late_init()
274 	clrsetbits_le16(&wdog->wcr, 0, 0x10);  in board_late_init()