Lines Matching refs:pin
248 unsigned int pin; in nand_pinmux_setup() local
250 for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(19); pin++) in nand_pinmux_setup()
251 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); in nand_pinmux_setup()
254 for (pin = SUNXI_GPC(20); pin <= SUNXI_GPC(22); pin++) in nand_pinmux_setup()
255 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); in nand_pinmux_setup()
291 unsigned int pin; in mmc_pinmux_setup() local
297 for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { in mmc_pinmux_setup()
298 sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0); in mmc_pinmux_setup()
299 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
300 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
311 for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) { in mmc_pinmux_setup()
312 sunxi_gpio_set_cfgpin(pin, SUN4I_GPH_SDC1); in mmc_pinmux_setup()
313 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
314 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
318 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { in mmc_pinmux_setup()
319 sunxi_gpio_set_cfgpin(pin, SUN4I_GPG_SDC1); in mmc_pinmux_setup()
320 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
321 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
326 for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) { in mmc_pinmux_setup()
327 sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1); in mmc_pinmux_setup()
328 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
329 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
333 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { in mmc_pinmux_setup()
334 sunxi_gpio_set_cfgpin(pin, SUN6I_GPG_SDC1); in mmc_pinmux_setup()
335 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
336 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
341 for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) { in mmc_pinmux_setup()
342 sunxi_gpio_set_cfgpin(pin, SUN8I_GPD_SDC1); in mmc_pinmux_setup()
343 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
344 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
348 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { in mmc_pinmux_setup()
349 sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1); in mmc_pinmux_setup()
350 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
351 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
362 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { in mmc_pinmux_setup()
363 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); in mmc_pinmux_setup()
364 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
365 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
370 for (pin = SUNXI_GPE(4); pin <= SUNXI_GPD(9); pin++) { in mmc_pinmux_setup()
371 sunxi_gpio_set_cfgpin(pin, SUN5I_GPE_SDC2); in mmc_pinmux_setup()
372 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
373 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
377 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { in mmc_pinmux_setup()
378 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); in mmc_pinmux_setup()
379 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
380 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
386 for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { in mmc_pinmux_setup()
387 sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC2); in mmc_pinmux_setup()
388 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
389 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
393 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { in mmc_pinmux_setup()
394 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); in mmc_pinmux_setup()
395 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
396 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
405 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { in mmc_pinmux_setup()
406 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); in mmc_pinmux_setup()
407 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
408 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
416 for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) { in mmc_pinmux_setup()
417 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); in mmc_pinmux_setup()
418 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
419 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
422 for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) { in mmc_pinmux_setup()
423 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); in mmc_pinmux_setup()
424 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
425 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
429 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) { in mmc_pinmux_setup()
430 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); in mmc_pinmux_setup()
431 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
432 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
443 for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { in mmc_pinmux_setup()
444 sunxi_gpio_set_cfgpin(pin, SUNXI_GPI_SDC3); in mmc_pinmux_setup()
445 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
446 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
451 for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { in mmc_pinmux_setup()
452 sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC3); in mmc_pinmux_setup()
453 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
454 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()
458 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { in mmc_pinmux_setup()
459 sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3); in mmc_pinmux_setup()
460 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); in mmc_pinmux_setup()
461 sunxi_gpio_set_drv(pin, 2); in mmc_pinmux_setup()