250 	for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(19); pin++)  in nand_pinmux_setup()
254 	for (pin = SUNXI_GPC(20); pin <= SUNXI_GPC(22); pin++)  in nand_pinmux_setup()
260 	sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_NAND);  in nand_pinmux_setup()
362 		for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {  in mmc_pinmux_setup()
377 			for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
393 			for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
399 			sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);  in mmc_pinmux_setup()
400 			sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);  in mmc_pinmux_setup()
401 			sunxi_gpio_set_drv(SUNXI_GPC(24), 2);  in mmc_pinmux_setup()
405 		for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
411 		sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);  in mmc_pinmux_setup()
412 		sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);  in mmc_pinmux_setup()
413 		sunxi_gpio_set_drv(SUNXI_GPC(24), 2);  in mmc_pinmux_setup()
416 		for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) {  in mmc_pinmux_setup()
422 		for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) {  in mmc_pinmux_setup()
429 		for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) {  in mmc_pinmux_setup()
458 			for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
464 			sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3);  in mmc_pinmux_setup()
465 			sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);  in mmc_pinmux_setup()
466 			sunxi_gpio_set_drv(SUNXI_GPC(24), 2);  in mmc_pinmux_setup()