spear/x600/fpga.c

4  * SPDX-License-Identifier:	GPL-2.0+
28  * Set the active-low FPGA reset signal.
33 	 * On x600 we have no means to toggle the FPGA reset signal  in fpga_reset()
35 	debug("%s:%d: RESET (%d)\n", __func__, __LINE__, assert);  in fpga_reset()
39  * Set the FPGA's active-low SelectMap program line to the specified level
51  * Test the state of the active-low FPGA INIT line.  Return 1 on INIT
52  * asserted (low).
63 	 * INIT signal state generated via a local state-machine.  in fpga_init_fn()
74  * Test the state of the active-high FPGA DONE pin
81 	 * Wait for Tx-FIFO to become empty before looking for DONE  in fpga_done_fn()
83 	while (!(readl(&ssp->sspsr) & SSPSR_TFE))  in fpga_done_fn()
93  * FPGA pre-configuration function. Just make sure that
94  * FPGA reset is asserted to keep the FPGA from starting up after
99 	debug("%s:%d: FPGA pre-configuration\n", __func__, __LINE__);  in fpga_pre_config_fn()
106  * FPGA post configuration function. Blip the FPGA reset line and then see if
155 	 * Wait for Tx-FIFO to become ready  in fpga_wr_fn()
157 	while (!(readl(&ssp->sspsr) & SSPSR_TNF))  in fpga_wr_fn()
161 	writel(data, &ssp->sspdr);  in fpga_wr_fn()
202 	 * Disable reset, Low compression, Disable retiming, Enable Expi,  in expi_setup()
203 	 * Enable soft reset, DMA, PLL2, Internal  in expi_setup()
208 	       &misc->expi_clk_cfg);  in expi_setup()
211 	 * 6 uA, Internal feedback, 1st order, Non-dithered, Sample Parameters,  in expi_setup()
212 	 * Enable PLL2, Disable reset  in expi_setup()
214 	writel((pll2_m << 24) | (pll2_p << 8) | (pll2_n), &misc->pll2_frq);  in expi_setup()
216 	       PLL2_CNTL_RESETN | PLL2_CNTL_LOCK, &misc->pll2_cntl);  in expi_setup()
219 	 * Disable soft reset  in expi_setup()
221 	clrbits_le32(&misc->expi_clk_cfg, EXPI_CLK_CFG_RST);  in expi_setup()
235 	writel(readl(&misc->periph1_clken) | MISC_SSP2ENB | MISC_GPIO4ENB,  in x600_init_fpga()
236 	       &misc->periph1_clken);  in x600_init_fpga()
245 	writel(SSPCR0_DSS_16BITS, &ssp->sspcr0);  in x600_init_fpga()
246 	writel(SSPCR1_SSE, &ssp->sspcr1);  in x600_init_fpga()
255 	writel(2, &ssp->sspcpsr);  in x600_init_fpga()