Lines Matching full:ddr3
77 printf("Set default DDR3 settings\n"); in set_default_ddr3_timings()
78 settings.ddr3 = ddr3_default; in set_default_ddr3_timings()
85 printf("device:\t\t%s\n", settings.ddr3.manu_name); in print_ddr3_timings()
86 printf("marking:\t%s\n", settings.ddr3.manu_marking); in print_ddr3_timings()
167 /* Read Siemens eeprom data (DDR3) */ in read_eeprom()
169 (uchar *)&settings.ddr3, sizeof(struct ddr3_data))) { in read_eeprom()
170 …d not read the EEPROM; something fundamentally wrong on the I2C bus.\nUse default DDR3 timings\n"); in read_eeprom()
178 if (ddr3_default.magic == settings.ddr3.magic && in read_eeprom()
179 ddr3_default.version == settings.ddr3.version) { in read_eeprom()
180 printf("Using DDR3 settings from EEPROM\n"); in read_eeprom()
182 if (ddr3_default.magic != settings.ddr3.magic) in read_eeprom()
183 printf("Warning: No valid DDR3 data in eeprom.\n"); in read_eeprom()
184 if (ddr3_default.version != settings.ddr3.version) in read_eeprom()
185 printf("Warning: DDR3 data version does not match.\n"); in read_eeprom()
220 draco_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1; in board_init_ddr()
221 draco_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2; in board_init_ddr()
222 draco_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3; in board_init_ddr()
224 settings.ddr3.emif_ddr_phy_ctlr_1; in board_init_ddr()
225 draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config; in board_init_ddr()
227 draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl; in board_init_ddr()
229 draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0; in board_init_ddr()
230 draco_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0; in board_init_ddr()
231 draco_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0; in board_init_ddr()
232 draco_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0; in board_init_ddr()
234 draco_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio; in board_init_ddr()
235 draco_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout; in board_init_ddr()
236 draco_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio; in board_init_ddr()
237 draco_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout; in board_init_ddr()
238 draco_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio; in board_init_ddr()
239 draco_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout; in board_init_ddr()
241 draco_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val, in board_init_ddr()
242 draco_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val, in board_init_ddr()
243 draco_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val, in board_init_ddr()
244 draco_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val, in board_init_ddr()
245 draco_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val, in board_init_ddr()