119 	/* Set APLL to 1000MHz */  in board_clock_init()
142 	 * Set dividers for MOUTcore = 1000 MHz  in board_clock_init()
143 	 * coreout =      MOUT / (ratio + 1) = 1000 MHz (0)  in board_clock_init()
144 	 * corem0 =     armclk / (ratio + 1) = 333 MHz (2)  in board_clock_init()
145 	 * corem1 =     armclk / (ratio + 1) = 166 MHz (5)  in board_clock_init()
146 	 * periph =     armclk / (ratio + 1) = 1000 MHz (0)  in board_clock_init()
147 	 * atbout =       MOUT / (ratio + 1) = 200 MHz (4)  in board_clock_init()
148 	 * pclkdbgout = atbout / (ratio + 1) = 100 MHz (1)  in board_clock_init()
149 	 * sclkapll = MOUTapll / (ratio + 1) = 1000 MHz (0)  in board_clock_init()
150 	 * core2out = core_out / (ratio + 1) = 1000 MHz (0) (armclk)  in board_clock_init()
163 	 * For MOUThpm = 1000 MHz (MOUTapll)  in board_clock_init()
184 	 * MUX_PWI_SEL:      0110 (MPLL); 0111 (EPLL); 1000 (VPLL); 0(XXTI)  in board_clock_init()
203 	/* Set MPLL to 800MHz */  in board_clock_init()
228 	 * MOUTdmc = 800 MHz  in board_clock_init()
229 	 * MOUTdphy = 800 MHz  in board_clock_init()
252 	 * MOUTg2d = 800 MHz  in board_clock_init()
253 	 * MOUTc2c = 800 Mhz  in board_clock_init()
254 	 * MOUTpwi = 108 MHz  in board_clock_init()
290 	 * For MOUTuart0-4: 800MHz  in board_clock_init()
306 	 * For MOUTmmc0-3 = 800 MHz (MPLL)  in board_clock_init()
326 	 * For MOUTmmc0-3 = 800 MHz (MPLL)  in board_clock_init()
345 	 * For MOUTmmc4 = 800 MHz (MPLL)  in board_clock_init()
472 	/* Set Ref freq 0 => 24MHz, 1 => 26MHz*/  in board_usb_init()
473 	/* Odroid Us have it at 24MHz, Odroid Xs at 26MHz */  in board_usb_init()