Lines Matching +full:0 +full:x00800000
15 #define MODE_MSK_FREE_RUN 0x00000001
16 #define MODE_VAL_FREE_RUN 0x00000000
17 #define MODE_MSK_STEP_UP 0x00000001
18 #define MODE_VAL_STEP_UP 0x00000000
21 #define MODE_MSK_BOOT_SQPI_16KB_FAST 0x0000000E
22 #define MODE_VAL_BOOT_SQPI_16KB_FAST 0x00000004
23 #define MODE_MSK_BOOT_SQPI_16KB_SLOW 0x0000000E
24 #define MODE_VAL_BOOT_SQPI_16KB_SLOW 0x00000008
25 #define MODE_MSK_BOOT_SQPI_4KB_SLOW 0x0000000E
26 #define MODE_VAL_BOOT_SQPI_4KB_SLOW 0x0000000C
29 #define MODE_MSK_BOOT_CA15 0x000000C0
30 #define MODE_VAL_BOOT_CA15 0x00000000
31 #define MODE_MSK_BOOT_CA7 0x000000C0
32 #define MODE_VAL_BOOT_CA7 0x00000040
33 #define MODE_MSK_BOOT_SH4 0x000000C0
34 #define MODE_VAL_BOOT_SH4 0x000000C0
37 #define MODE_MSK_JTAG_CORESIGHT 0xC0301C00
38 #define MODE_VAL_JTAG_CORESIGHT 0x00200000
39 #define MODE_MSK_JTAG_SH4 0xC0301C00
40 #define MODE_VAL_JTAG_SH4 0x00300000
43 #define MODE_MSK_DDR3_1600 0x00080000
44 #define MODE_VAL_DDR3_1600 0x00000000
45 #define MODE_MSK_DDR3_1333 0x00080000
46 #define MODE_VAL_DDR3_1333 0x00080000
49 #define MODE_MSK_PHY0_SATA0 0x01000000
50 #define MODE_VAL_PHY0_SATA0 0x00000000
51 #define MODE_MSK_PHY0_PCIE 0x01000000
52 #define MODE_VAL_PHY0_PCIE 0x01000000
55 #define MODE_MSK_PHY1_SATA1 0x00800000
56 #define MODE_VAL_PHY1_SATA1 0x00000000
57 #define MODE_MSK_PHY1_USB3 0x00800000
58 #define MODE_VAL_PHY1_USB3 0x00800000
99 #define MUX_MSK_VIN0_BT656 0x00001001
100 #define MUX_VAL_VIN0_BT656 0x00000000
102 #define MUX_MSK_VIN0_full 0x00001007
103 #define MUX_VAL_VIN0_full 0x00000002
105 #define MUX_MSK_VIN1_BT656 0x00000801
106 #define MUX_VAL_VIN1_BT656 0x00000800
108 #define MUX_MSK_VIN1_10bit 0x00000821
109 #define MUX_VAL_VIN1_10bit 0x00000800
111 #define MUX_MSK_VIN1_12bit 0x000008A1
112 #define MUX_VAL_VIN1_12bit 0x00000880
114 #define MUX_MSK_VIN2_BT656 0x00000007
115 #define MUX_VAL_VIN2_BT656 0x00000006
117 #define MUX_MSK_VIN2_withSYNC 0x000000A7
118 #define MUX_VAL_VIN2_withSYNC 0x00000086
120 #define MUX_MSK_VIN2_withFIELD 0x0000000F
121 #define MUX_VAL_VIN2_withFIELD 0x0000000E
123 #define MUX_MSK_VIN2_withSYNCandFIELD 0x000000AF
124 #define MUX_VAL_VIN2_withSYNCandFIELD 0x0000008E
126 #define MUX_MSK_VIN3_BT656 0x00000101
127 #define MUX_VAL_VIN3_BT656 0x00000100
129 #define MUX_MSK_VIN3_withFIELD 0x00000121
130 #define MUX_VAL_VIN3_withFIELD 0x00000120
132 #define MUX_MSK_VIN3_withSYNCandFIELD 0x00000161
133 #define MUX_VAL_VIN3_withSYNCandFIELD 0x00000120
135 #define MUX_MSK_AVB 0x00000003
136 #define MUX_VAL_AVB 0x00000000
138 #define MUX_MSK_QSPI_ONBOARD 0x00000019
139 #define MUX_VAL_QSPI_ONBOARD 0x00000000
141 #define MUX_MSK_QSPI_COMEXPRESS 0x00000019
142 #define MUX_VAL_QSPI_COMEXPRESS 0x00000010
144 #define MUX_MSK_I2C1 0x00000061
145 #define MUX_VAL_I2C1 0x00000060
147 #define MUX_MSK_IRQ3 0x00000101
148 #define MUX_VAL_IRQ3 0x00000000
150 #define MUX_MSK_SCIFA0_USB 0x00004081
151 #define MUX_VAL_SCIFA0_USB 0x00004000
153 #define MUX_MSK_SCIFA0_COMEXPRESS 0x00004081
154 #define MUX_VAL_SCIFA0_COMEXPRESS 0x00000000
156 #define MUX_MSK_SCIFA2 0x00002001
157 #define MUX_VAL_SCIFA2 0x00000000
159 #define MUX_MSK_ETH_ONBOARD 0x00000600
160 #define MUX_VAL_ETH_ONBOARD 0x00000000
162 #define MUX_MSK_ETH_COMEXPRESS 0x00000600
163 #define MUX_VAL_ETH_COMEXPRESS 0x00000400
165 #define MUX_MSK_SD0 0x00000801
166 #define MUX_VAL_SD0 0x00000000
168 #define MUX_MSK_SD2 0x00001001
169 #define MUX_VAL_SD2 0x00001000
171 #define MUX_MSK_PWM210 0x00002001
172 #define MUX_VAL_PWM210 0x00002000
174 #define HDMI_MSK 0x07
175 #define HDMI_OFF 0x00
176 #define HDMI_ONBOARD 0x07
177 #define HDMI_COMEXPRESS 0x05
178 #define HDMI_ONBOARD_NODDC 0x03
179 #define HDMI_COMEXPRESS_NODDC 0x01