Lines Matching +full:0 +full:x00010006
126 * 0 0xa0000000 0x00000000 1 64M 0 0
127 * 1 0xa4000000 0x04000000 1 16M 0 0
128 * 2 0xa6000000 0x08000000 1 16M 0 0
129 * 9 0x88000000 0x48000000 1 128M 1 1
130 * 10 0x90000000 0x50000000 1 128M 1 1
131 * 11 0x98000000 0x58000000 1 128M 1 1
132 * 13 0xa8000000 0x48000000 1 128M 0 0
133 * 14 0xb0000000 0x50000000 1 128M 0 0
134 * 15 0xb8000000 0x58000000 1 128M 0 0
169 PXCR_D: .word 0x0000
171 PHCR_D: .word 0x00c0
172 PJCR_D: .word 0xc3fc
173 PKCR_D: .word 0x03ff
174 PMCR_D: .word 0xffff
175 PNCR_D: .word 0xf0c3
177 PEPUPR_D: .long 0xff
178 PHPUPR_D: .long 0x00
179 PJPUPR_D: .long 0x00
180 PKPUPR_D: .long 0x00
181 PLPUPR_D: .long 0x00
182 PMPUPR_D: .long 0xfc
183 PNPUPR_D: .long 0x00
184 PPUPR1_D: .word 0xffbf
185 PPUPR2_D: .word 0xff00
186 P1MSELR_D: .word 0x3780
187 P2MSELR_D: .word 0x0000
189 #define GPIO_BASE 0xffe70000
190 PACR_A: .long GPIO_BASE + 0x00
191 PBCR_A: .long GPIO_BASE + 0x02
192 PCCR_A: .long GPIO_BASE + 0x04
193 PDCR_A: .long GPIO_BASE + 0x06
194 PECR_A: .long GPIO_BASE + 0x08
195 PFCR_A: .long GPIO_BASE + 0x0a
196 PGCR_A: .long GPIO_BASE + 0x0c
197 PHCR_A: .long GPIO_BASE + 0x0e
198 PJCR_A: .long GPIO_BASE + 0x10
199 PKCR_A: .long GPIO_BASE + 0x12
200 PLCR_A: .long GPIO_BASE + 0x14
201 PMCR_A: .long GPIO_BASE + 0x16
202 PNCR_A: .long GPIO_BASE + 0x18
203 PPCR_A: .long GPIO_BASE + 0x1a
204 PQCR_A: .long GPIO_BASE + 0x1c
205 PRCR_A: .long GPIO_BASE + 0x1e
206 PEPUPR_A: .long GPIO_BASE + 0x48
207 PHPUPR_A: .long GPIO_BASE + 0x4e
208 PJPUPR_A: .long GPIO_BASE + 0x50
209 PKPUPR_A: .long GPIO_BASE + 0x52
210 PLPUPR_A: .long GPIO_BASE + 0x54
211 PMPUPR_A: .long GPIO_BASE + 0x56
212 PNPUPR_A: .long GPIO_BASE + 0x58
213 PPUPR1_A: .long GPIO_BASE + 0x60
214 PPUPR2_A: .long GPIO_BASE + 0x62
215 P1MSELR_A: .long GPIO_BASE + 0x80
216 P2MSELR_A: .long GPIO_BASE + 0x82
218 MMSELR_A: .long 0xfc400020
220 MMSELR_D: .long 0xa5a50005
222 MMSELR_D: .long 0xa5a50002
226 #define DBSC2_BASE 0xfe800000
227 DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c
228 DBSC2_DBEN_A: .long DBSC2_BASE + 0x10
229 DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14
230 DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20
231 DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30
232 DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34
233 DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38
234 DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40
235 DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44
236 DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48
237 DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c
238 DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50
239 DBSC2_DBDICODTOCD_A:.long DBSC2_BASE + 0x54
240 DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60
241 DDR_DUMMY_ACCESS_A: .long 0x40000000
243 DBSC2_DBCONF_D: .long 0x00630002
244 DBSC2_DBTR0_D: .long 0x050b1f04
245 DBSC2_DBTR1_D: .long 0x00040204
246 DBSC2_DBTR2_D: .long 0x02100308
247 DBSC2_DBFREQ_D1: .long 0x00000000
248 DBSC2_DBFREQ_D2: .long 0x00000100
249 DBSC2_DBDICODTOCD_D:.long 0x000f0907
251 DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003
252 DBSC2_DBCMDCNT_D_PALL: .long 0x00000002
253 DBSC2_DBCMDCNT_D_REF: .long 0x00000004
255 DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000
256 DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000
257 DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006
258 DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386
259 DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952
260 DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852
262 DBSC2_DBEN_D: .long 0x00000001
264 DBSC2_DBPDCNT0_D3: .long 0x00000080
265 DBSC2_DBRFCNT1_D: .long 0x00000926
266 DBSC2_DBRFCNT2_D: .long 0x00fe00fe
267 DBSC2_DBRFCNT0_D: .long 0x00010000
272 PASCR_A: .long 0xff000070
273 PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */
291 BCR_D: .long 0x80000003
292 CS0BCR_D: .long 0x22222340
293 CS0WCR_D: .long 0x00111118
294 CS1BCR_D: .long 0x11111100
295 CS1WCR_D: .long 0x33333303
296 CS4BCR_D: .long 0x11111300
297 CS4WCR_D: .long 0x00101012
300 CS_USB_BCR_D: .long 0x11111200
301 CS_USB_WCR_D: .long 0x00020005
304 CS_SD_BCR_D: .long 0x00000300
305 CS_SD_WCR_D: .long 0x00030108
308 CS_I2C_BCR_D: .long 0x11111100
309 CS_I2C_WCR_D: .long 0x00000003
313 PMB_ADDR_FLASH_A: .long PMB_ADDR_BASE(0)
323 PMB_ADDR_FLASH_D: .long mk_pmb_addr_val(0xa0)
324 PMB_ADDR_CPLD_D: .long mk_pmb_addr_val(0xa4)
325 PMB_ADDR_USB_D: .long mk_pmb_addr_val(0xa6)
326 PMB_ADDR_DDR_C1_D: .long mk_pmb_addr_val(0x88)
327 PMB_ADDR_DDR_C2_D: .long mk_pmb_addr_val(0x90)
328 PMB_ADDR_DDR_C3_D: .long mk_pmb_addr_val(0x98)
329 PMB_ADDR_DDR_N1_D: .long mk_pmb_addr_val(0xa8)
330 PMB_ADDR_DDR_N2_D: .long mk_pmb_addr_val(0xb0)
331 PMB_ADDR_DDR_N3_D: .long mk_pmb_addr_val(0xb8)
333 PMB_DATA_FLASH_A: .long PMB_DATA_BASE(0)
344 PMB_DATA_FLASH_D: .long mk_pmb_data_val(0x00, 1, 1, 0, 1, 0, 1)
345 PMB_DATA_CPLD_D: .long mk_pmb_data_val(0x04, 1, 1, 0, 0, 0, 1)
346 PMB_DATA_USB_D: .long mk_pmb_data_val(0x08, 1, 1, 0, 0, 0, 1)
347 PMB_DATA_DDR_C1_D: .long mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)
348 PMB_DATA_DDR_C2_D: .long mk_pmb_data_val(0x50, 0, 1, 1, 0, 1, 1)
349 PMB_DATA_DDR_C3_D: .long mk_pmb_data_val(0x58, 0, 1, 1, 0, 1, 1)
350 PMB_DATA_DDR_N1_D: .long mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)
351 PMB_DATA_DDR_N2_D: .long mk_pmb_data_val(0x50, 1, 1, 1, 0, 0, 1)
352 PMB_DATA_DDR_N3_D: .long mk_pmb_data_val(0x58, 1, 1, 1, 0, 0, 1)
354 DUMMY_ADDR: .long 0xa0000000
355 PASCR_29BIT_D: .long 0x00000000
356 PASCR_INIT: .long 0x80000080 /* check booting mode */
357 MMUCR_A: .long 0xff000010
358 MMUCR_D: .long 0x00000004 /* clear ITLB */
361 CCR_A: .long 0xff00001c
362 CCR_D: .long 0x0000090b